Reduced noise data output buffer with output level regulation

A data output buffer in a semiconductor device, comprising:

• a latch circuit outputting a first, second and third latch signal in response to an output enable signal and an input signal;
• a pull-down transistor activated by said third latch signal of said latch circuit;
• a delay circuit to delay said second latch signal of said latch circuit;
• a first switching circuit switched on in response to an output signal of said delay circuit;
• a second switching circuit connected to said first switching circuit and switched on in response to said second latch signal of said latch circuit;
• a control circuit activated by said first latch signal and the operation of said first and second switching circuits;
• a reference voltage generator for generating a constant reference voltage;
• a voltage comparator activated by an output signal of said control circuit and for comparing the output voltage of a data output buffer with the output voltage of said reference voltage generator, thereby outputting a compared signal to said control circuit;
• a pull-up transistor activated in response to another output signal of said control circuit and connected to said pull-down transistor via an output terminal;
• and
• a voltage regulator activated by said second latch signal of said latch circuit and connected to said output terminal, and said reference voltage generator.