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AssigneeKabushiki Kaisha Toshiba
InventorsHiroshi Tazawa, Chiaki Takubo, Yoshiharu Tsuboi, Mamoru Sasaki
Estimating the term…
A semiconductor assembly comprises first and second containers which contain respective semiconductor chips and are stacked one over another. First and second external leads extending from the insides of the respective containers to outside thereof are bent so as to be connected to each other. The first and the second containers may be provided at corresponding positions with a recess and a projection to be engaged each other for positional alignment. There may be provided first and second heat radiating plates extending from the insides of the respective containers to outside thereof are bent so as to be connected to each other.
A semiconductor assembly comprising:
A semiconductor device adapted to be stacked with another device having a body and a lead extending outward downward bent portion joining with a first flat interconnection portion further extending outward to an upward bent portion joining with a second flat interconnection portion, the first flat interconnection portion being disposed at or below a lower surface level of the body, and the second flat interconnection portion being disposed at or above an upper surface level of the body, the semiconductor device comprising:
A semiconductor device adapted to be stacked with another device having a body and a lead extending outward to an upward bent portion joining with a first flat interconnection portion further extending outward to a downward bent portion joining with a second flat interconnection portion, the first flat interconnection portion being disposed at or above an upper surface level of the body, and the second flat interconnection portion being disposed at or below a lower surface level of the body, the semiconductor device comprising:
A semiconductor assembly comprising:
Dependencies are inferred from the claim text.
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From the US filing history. Foreign family members aren’t listed.
No references of this kind are recorded.
Characterised by their shape or disposition: the semiconductor body being completely enclosed
Of leadframes: mechanical treatments, e.g. punching, cutting, deforming or cold welding
Leadframes: shapes or dispositions
Bent parts: being the outer leads
Term ended 16 Apr 2013 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
1. Field of the Invention
The present invention relates to semiconductor assemblies, and more particularly, to a semiconductor assembly having a laminated layer structure of a plurality of semiconductor devices.
2. Description of the Related Art
In the accompanying drawings:
FIG. 1 is a cross-sectional view of a semiconductor assembly in accordance with a first embodiment of the present invention;
FIG. 2 is a perspective view of the first embodiment;
Embodiments of the present invention will be explained in detail with reference to the accompanying drawings.
Referring to FIGS. 1 and 2, the semiconductor assembly comprises four semiconductor devices having containers stacked one over another. A first container 10a containing a first semiconductor chip 11a is stacked on a second container 10b containing a second semiconductor chip 11b. First and second external leads 12a and 12b extend from the insides of the containers 10a and 10b to the outside thereof and are bent respectively to the levels of the top and bottom surfaces of the first and second containers and then connected with each other in surface contact relationship to form a pair of interconnection portion 13. The interconnection portion 13 is then connected a wiring pattern 14 formed on a printed circuit board 15.
The first and second containers are provided at their corresponding positions with a recess 19a and a projection 19b for positional alignment which can fit into associated projection and recess of other containers.