Trench gate type insulated gate bipolar transistor

A semiconductor device comprising:

• a semiconductor body having first and second major surfaces;
• a plurality of trench portions each selectively formed from the first major surface of said body to a predetermined depth;
• a plurality of insulating films formed over respective inner walls of said plurality of trench portions and part of the first major surface of said body;
• a plurality of control electrode layers filled respectively in said plurality of trench portions, with said plurality of insulating films sandwiched between said control electrode layers and the inner walls of said trench portions, and extending over said part of the first major surface of said body, with said plurality of insulating films sandwiched between said control electrode layers and said body;
• a plurality of insulating layers formed respectively on said plurality of control electrode layers in said plurality of trench portions and projecting from the first major surface of said body;
• a first main electrode formed over the first major surface of said body;
• and
• a second main electrode formed on the second major surface of said body,
• wherein a control voltage applied commonly to said plurality of control electrode layers controls current between said first and second main electrodes, and
• wherein
• the conditional expression:
• H2.gtoreq.H1 is satisfied where H1 is a height of said plurality of control electrode layers formed over said part of the first major surface of said body from the first major surface of said body and H2 is a height of said plurality of insulating layers over said plurality of trench portions from the first major surface of said body.

A semiconductor device comprising:

• a semiconductor body having first and second major surfaces;
• a plurality of trench portions each selectively formed from the first major surface of said body to a predetermined depth;
• a plurality of insulating films formed over respective inner walls of said plurality of trench portions and part of the first major surface of said body;
• a plurality of control electrode layers filled respectively in said plurality of trench portions, with said plurality of insulating films sandwiched between said control electrode layers and the inner walls of said trench portions, and extending over said part of the first major surface of said body, with said plurality of insulating films sandwiched between said control electrode layers and said body;
• a plurality of insulating layers formed respectively on said plurality of control electrode layers in said plurality of trench portions and projecting from the first major surface of said body;
• a first main electrode formed over the first major surface of said body;
• and
• a second main electrode formed on the second major surface of said body,
• wherein a control voltage applied commonly to said plurality of control electrode layers controls current between said first and second main electrodes, and
• wherein each of said plurality of insulating layers over said plurality of trench portions has a smooth inclined surface from top to bottom, and
• the conditional expression:
• H2.gtoreq.H1 and
• the conditional expression:
• Y/X.ltoreq.5 are both satisfied where X is a length of said inclined surface in a direction of the first major surface of said body, Y is a height of said inclined surface from the first major surface of said body, Y is a height of said plurality of control electrode layers formed over said part of the first major surface of said body from the first major surface of said body, and H2 is a height of said plurality of insulating layers over said plurality of trench portions from the first major surface of said body.

A semiconductor device comprising:

• a body having first and second major surfaces and including an upper layer portion adjacent the first major surface and a lower layer portion adjacent the second major surface, at least said upper layer portion being made of a semiconductor of a first conductivity type;
• a plurality of first semiconductor regions of a second conductivity type selectively formed in said upper layer portion of said body;
• a plurality of second semiconductor regions of the first conductivity type selectively formed in respective surfaces of said plurality of first semiconductor regions;
• a plurality of insulating films each formed on one of said first semiconductor regions between said upper layer portion of said body and said second semiconductor regions;
• a plurality of control electrodes formed respectively on said plurality of insulating films;
• a plurality of insulating layers for covering said plurality of insulating films and said plurality of control electrodes, respectively;
• a first main electrode formed over the first major surface of said body;
• and
• a second main electrode formed on the second major surface of said body,
• wherein a control voltage applied commonly to said plurality of control electrodes controls current between said first and second main electrodes, and
• wherein each of said plurality of insulating layers has an opposite surface, which is opposite the first surface, with rounded edges between an inclined surface, extending from the first major surface, and said opposite surface for preventing cavities from forming in the first main electrode during formation of the semiconductor device, and
• the conditional expression:
• Y/X.ltoreq.5 is satisfied where X is a length of said rounded edges in a direction of the first major surface of said body and Y is a height measured between a point where the rounded edges meet the opposite surface and the first major surface of said body;
• wherein said plurality of control electrodes are spaced a predetermined distance apart from each other, and
• the conditional expression (W/H).ltoreq.8 is satisfied where W is said predetermined distance and H is a heiqht of said plurality of insulating layers from the first major surface of said body.