Method for fabricating a semiconductor memory

Abstract

A method for fabricating a semiconductor memory, including the steps of: forming a memory cell transistor having a gate electrode, a source area and a drain area on a semiconductor substrate; forming an insulating film over the memory cell transistor; forming an etch preventing film over the insulating film; forming multi-layer films over the etch preventing film by stacking alternately a disposable film and a conduction layer; selectively etching the multi-layer films corresponding to a contact hole to form a stacked film pattern; forming conductive sidewalls on sides of the stacked film pattern; forming a photoresist pattern on the stacked film pattern; selectively etching the etch preventing film and the insulating film by using the photoresist pattern and the conductive sidewall, and thereby forming the contact hole; forming an upper conductive film on the stacked film pattern and the contact hole including the conductive sidewall; patterning the upper conductive film and the stacked film pattern to thereby form a capacitor storage node pattern; and removing the disposable film.

Dependencies are inferred from the claim text.