Salicide process for a MOS semiconductor device using nitrogen implant of titanium

A method for manufacturing a semiconductor device having a salicide structure and a lightly doped drain structure, the method comprising the steps of:

• forming a gate insulating layer on the surface of a semiconductor substrate;
• forming a polysilicon layer on said gate insulating layer;
• patterning said polysilicon layer into a gate electrode having vertical sidewalls and a top surface;
• introducing impurities into said semiconductor substrate using said gate electrode as a mask to form lightly doped source/drain regions;
• forming a first insulating layer on the surface of said semiconductor substrate and on said gate electrode;
• patterning said first insulating layer to form sidewall spacers on the sidewalls of said gate electrode by anisotropic etching said first insulating layer;
• introducing impurities into said semiconductor substrate using said gate electrode and said sidewall spacers as a mask to form highly doped source/drain regions;
• then:
• forming a titanium layer on the surfaces of said semiconductor substrate, said sidewall spacers, and said gate electrode;
• implanting nitrogen at an angle from the surface plane of said substrate from between about 30.degree. and 60.degree. into said titanium layer thus forming a titanium nitride layer over said titanium layer;
• thermally annealing said titanium layer forming titanium silicide on the top surface of said gate electrode and in said highly doped source/drain regions;
• and
• etching said titanium nitride layer and any of the remaining titanium layer thereby leaving titanium silicide on the top surface of said gate electrode and in said highly doped source/drain regions.