Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit

An electronic semiconductor structure comprising:

• a plurality of semiconductor chips electrically coupled together in a system, at least one semiconductor chip of the plurality of semiconductor chips having a memory with m memory cells, wherein m is an integer;
• a control circuit for coupling said plurality of semiconductor chips to external circuitry, said control circuit including selection means for facilitating access to a selected semiconductor chip, said selected semiconductor chip comprising one semiconductor chip of the at least one semiconductor chip having a memory, said selected semiconductor chip corresponding to an address received from the external circuitry, said control circuit including a plurality of circuit paths;
• a spare memory circuit functionally integrated with said plurality of circuit paths of said control circuit, and having n memory cells, wherein n is an integer and n.ltoreq.m, said spare memory circuit being electrically connected to said at least one semiconductor chip having said memory and being programmable such that a single memory cell of the n memory cells of the spare memory circuit can functionally replace a single failed memory cell of said m memory cells of the at least one semiconductor chip having said memory.