Method of constructing CMOS vertically modulated wells (VMW) by clustered MeV BILLI (buried implanted layer for lateral isolation) implantation

That method of manufacturing a semiconductor device comprising the following steps:

• forming isolation areas or active areas in a surface of a substrate,
• placing a mask on said surface, and
• carrying out a clustered series of four to six implants, said clustered series of four to six implants being carried out as follows:
• first, directing p-type ions onto said surface with a first energy sufficient to penetrate said mask and sufficient to form a first retrograde p-well,
• second, directing p-type ions onto said surface with a second energy less than said first energy but sufficient to penetrate said mask and sufficient to form a channel stop implant or second retrograde p-well which is shallower than the first retrograde p-well,
• as an optional third step, directing p-type ions onto said surface with a third energy less than said second energy but sufficient to penetrate said mask and sufficient to form a threshhold voltage layer V.sub.t at the surface of the retrograde p-well,
• fourth, directing n-type ions onto said surface with a fourth energy insufficient to penetrate said mask but sufficient to form a first retrograde n-well, and
• fifth, directing n-type ions onto said surface with a fifth energy less than said fourth energy but sufficient to form a channel stop implant or second retrograde n-well which is shallower than the first retrograde n-well.

That method of manufacturing a semiconductor device having a twin-well structure on a p-substrate comprising the following steps:

• forming isolation areas or active areas in a surface of a substrate,
• carrying out a blanket Vt implant,
• placing a mask on said surface, and
• carrying out a clustered series of four to six implants, said clustered series of four to six implants being carried out as follows:
• first, directing p-type ions onto said surface with a first energy sufficient to penetrate said mask and sufficient to form a first retrograde p-well,
• second, directing p-type ions onto said surface with a second energy less than said first energy but sufficient to penetrate said mask and sufficient to form a channel stop implant or second retrograde p-well which is shallower than the first retrograde p-well,
• third, directing n-type ions onto said surface with a third energy insufficient to penetrate said mask but sufficient to form a first retrograde n-well, and
• fourth, directing n-type ions onto said surface with a fourth energy less than said third energy but sufficient to form a channel stop implant or second retrograde n-well which is shallower than the first retrograde n-well.

That method of manufacturing a semiconductor device having a twin-well structure on an n-substrate comprising the following steps:

• forming isolation areas or active areas in a surface of an n-type substrate 110,
• placing a mask on said surface, and
• carrying out a clustered series of four to six implants, said clustered series of four to six implants being carried out as follows:
• first, directing n-type ions onto said surface with a first energy sufficient to penetrate said mask and sufficient to form a lower layer 109 of n-type material, so that a retrograde n-well 108,109 is formed,
• second, directing n-type ions onto said surface with a second energy less than said first energy but sufficient to penetrate said mask and sufficient to form an upper layer 108 of n-type material, so that a channel stop is formed,
• as an optional third step, directing n-type or p-type ions onto said surface with a third energy less than said second energy but sufficient to penetrate said mask and sufficient to form a threshhold voltage layer V.sub.t at the surface of the retrograde n-well 108,109,
• fourth, directing p-type ions onto said surface with a fourth energy insufficient to penetrate said mask but sufficient to form a lower layer 107 of p-type material, so that a retrograde p-well 106,107 is formed,
• fifth, directing p-type ions onto said surface with a fifth energy less than said fourth energy but sufficient to form an upper layer 106 of p-type material, so that a channel stop is formed, and,
• as an optional sixth step, directing p-type ions onto said surface with a sixth energy less than said fifth energy but sufficient to form a threshhold voltage layer V.sub.t at the surface of the retrograde p-well 106,107.

That method of manufacturing a semiconductor device having a triple-well structure comprising the following steps:

• forming isolation areas or active areas in a surface of a p-type substrate 110,
• placing a first mask on said surface, said mask having at least one aperture,
• directing n-type ions onto said surface with a first energy insufficient to penetrate said first mask and sufficient to form a buried n-layer underneath said aperture,
• removing said first mask and placing a second (n-well) mask on said surface, said mask having at least one solid portion and having a thickness sufficient to block the maximum energy of n-type ions, said second mask being placed so that said solid portion is above said buried n-layer, and
• carrying out a clustered series of four to six implants, said clustered series of four to six implants being carried out as follows:
• first, directing p-type ions onto said surface with a second energy sufficient to penetrate said second mask and sufficient to form a lower layer 107 of p-type material so that a retrograde p-well is formed, but at a dose not to compensate the buried n-layer,
• second, directing p-type ions onto said surface with a third energy less than said second energy and sufficient to form an upper layer 106 of p-type material so that a channel stop is formed in the p-wells,
• as an optional third step, directing p-type ions onto said surface with a fourth energy less than said third energy and sufficient to form a threshhold voltage layer V.sub.t at the surface of the retrograde p-well 106,107,
• fourth, directing n-type ions onto said surface with a fifth energy insufficient to penetrate said second mask but sufficient to form a lower layer 109 of n-type material, so that a retrograde n-well is formed, and
• fifth, directing n-type ions onto said surface with a sixth energy insufficient to penetrate said second mask but sufficient to form an upper layer 108 of n-type material so that a channel stop is formed.

That method of manufacturing a semiconductor device having a twin-well structure on a p-substrate comprising the following steps:

• forming isolation areas or active areas in a surface of a substrate,
• placing a mask on said surface, and
• carrying out a clustered series of four to six implants, said clustered series of four to six implants being carried out as follows:
• first, directing p-type ions onto said surface with a first energy sufficient to penetrate said mask and sufficient to form a first retrograde p-well,
• second, directing p-type ions onto said surface with a second energy less than said first energy but sufficient to penetrate said mask and sufficient to form a channel stop implant or second retrograde p-well which is shallower than the first retrograde p-well,
• third, directing n-type ions onto said surface with a third energy insufficient to penetrate said mask but sufficient to form a first retrograde n-well,
• fourth, directing n-type ions onto said surface with a fourth energy less than said third energy but sufficient to form a channel stop implant or second retrograde n-well which is shallower than the first retrograde n-well, and
• fifth, removing said mask and thereafter carrying out a blanket V.sub.t implant.