US 5,499,263 AGranted

Multiplexing arrangement

AssigneeAlcatel

InventorsJean-Jacques Schmit, Daniel F. J. Van De Pol, Rudy Van Eeckhout

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Abstract

A circuit is provided for multiplexing data packets, each having sets of n digital words and a residual set of r digital words. The multiplexing arrangement includes an output terminal (OUT), input memory units (RAM0-RAM3) each to receive and to store the data packets in memory portions and each to store n digital words, and a multiplexer (MUX) coupled to the input memory units (RAM0-RAM3) and to transfer the data packets thereof to the output terminal (OUT). The circuit also includes a register (RGN) and a residual register (RGR), each connected in parallel to the input memory units (RAM0-RAM3). The register (RGN) reads and transfers the sets of n digital words to the multiplexer (MUX). The residual register (RGR) reads and transfers the residual set of r digital words to the multiplexer (MUX). The multiplexer (MUX) combines the set of n digital words and the residual set of r digital words, forming a combined set, and providing at least a portion of the combined set to the output terminal (OUT).

Claims10

Dependent claims

A circuit for multiplexing data packets, each having a set of n digital words and a residual set of r digital words, where n and r are integers and r is smaller than n, said multiplexing arrangement including an output terminal (OUT), a plurality of input memory units (RAM0-RAM3) each to receive and to store at least one of said data packets in a plurality of memory portions each to store n digital words, and a multiplexing means (MUX) coupled to said plurality of input memory units (RAM0-RAM3) and to transfer the data packets thereof to said output terminal (OUT), characterized in that

said circuit further includes register means (RGN) and residual register means (RGR), each connected in parallel to said plurality of input memory units (RAM0-RAM3), said register means (RGN) for reading and transferring said set of n digital words to said multiplexing means (MUX), said residual register means (RGR) for reading and transferring said residual set of r digital words to said multiplexing means (MUX), said multiplexing means (MUX) combining said set of n digital words and said residual set of r digital words, forming a combined set, and providing at least a portion of the combined set to said output terminal (OUT).

Dependencies are inferred from the claim text.

Facts

Application: 08/195,259Filed 14 Feb 1994
Priority: EP 9320048322 Feb 1993
Granted: 12 Mar 1996
Term ends: Not estimatedThe source records don’t support an estimate.

Classification7 codes

H04Q 11/0478
Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral,…:…
H04J 3/247
In which the allocation is indicated by an address the different channels being transmitted sequentially: aTM or packet multiplexing
H04L 2012/5672
Transfer mode dependent, e.g. ATM: multiplexing, e.g. coding, scrambling
H04L 2012/5678
Transfer mode dependent, e.g. ATM: traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management