Implementation of redundancy on a programmable logic device
AssigneeAltera Corporation
InventorsRichard G. Cliff, Rina Raman, Srinivas T. Reddy
Life of this patent
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Abstract
An improved architecture and method of operation for providing redundancy in programmable logic devices. Spare columns or rows of logic blocks 115 and switch boxes 140 are employed to replace columns or rows of logic blocks containing one or more defective logic blocks. Associated logic enable the device to bypass a column or row of logic blocks 115 containing one or more defective logic blocks 115 and to switch in a spare column or row of defect-free logic blocks 115 as replacement.
Claims15
A programmable logic device capable of remedying logic block defects, said programmable logic device comprising:
- a plurality of logic blocks disposed in an array format forming rows and columns, each block performing user-specified logic functions;
- a programmable interconnect for selectively connecting said logic blocks;
- and
- at least one of said columns of logic blocks replacing a selected column of logic blocks when a logic block in said selected column is defective.
A programmable logic device capable of remedying logic block defects, said programmable logic device comprising:
- a plurality of logic blocks disposed in an array format forming rows and columns, each block performing user-specified logic functions;
- a programmable interconnect for selectively connecting said logic blocks;
- and
- at least one of said columns of logic blocks replacing a selected column of logic blocks when a logic block in said selected column is defective wherein at least one logic block comprises a first input line for inputting data and a first output line for outputting data, said programmable logic device further comprising:
- a first redundant line connected to said first input line and a first selector for selectively coupling said first input line to a second input line, said second input line being coupled to one adjacent logic block on the same row;
- and
- a second selector coupled to said first input line for programmably coupling said first input line either to a second redundant line or to a second output line, said second redundant line being coupled to an input line of one other adjacent logic block on the same row, said second output line being coupled to said one other adjacent logic block on the same row.
A programmable logic device capable of remedying logic block defects, said programmable logic device comprising:
- a plurality of logic blocks disposed in an array format forming rows and columns, each block performing user-specified logic functions;
- a programmable interconnect for selectively connecting said logic blocks;
- and
- at least one of said rows of logic blocks replacing a selected row of logic blocks when a logic block in said selected row is defective.
A programmable logic device capable of remedying logic block defects, said programmable logic device comprising:
- a plurality of logic blocks disposed in an array format forming rows and columns, each block performing user-specified logic functions;
- a programmable interconnect for selectively connecting said logic blocks;
- and
- at least one of said rows of logic blocks replacing a selected row of logic blocks when a logic block in said selected row is defective wherein at least one of said logic blocks comprises a first input line for inputting data and a first output line for outputting data, said programmable logic device further comprising:
- a first redundant line connected between said first input line and a first selector for selectively coupling said first input line to a second input line, said second input line being coupled to one adjacent logic block on the same column;
- and
- a second selector coupled to said first input line for programmably coupling said first input line either to a second redundant line or to a second output line, said second redundant line being coupled to an input line of one other adjacent logic block on the same column, said second output line being coupled to said one other adjacent logic block on the same column.
A method for remedying logic block defects in a programmable logic device, said method comprising the steps of:
- reserving at least one column of logic blocks for remedying logic block defects;
- thereafter
- identifying a defective logic block;
- and
- shifting a first set of configuration data for individual logic blocks of a first column of logic blocks, said first column of logic blocks containing said defective logic block and said first set of configuration data having been intended for said individual logic blocks of said first column of logic blocks had said defective logic block been defect-free, onto respective individual logic blocks of a second column of logic blocks.
Dependencies are inferred from the claim text.