Method of making LDD with polysilicon and dielectric spacers

A method of manufacturing an FET semiconductor device on a semiconductor substrate, comprising the steps of:

• comprising a first conductivity type dopant,
• forming a polycrystalline silicon gate electrode having vertical sidewalls on said gate insulating layer,
• forming shallow low concentration impurity regions of a second conductivity type dopant in said substrate using the gate electrode as a mask,
• forming a silicon oxide film on the sidewall surfaces and top surface of said gate electrode,
• depositing a layer of polycrystalline silicon over the substrate and gate electrode,
• reactive ion etching the polycrystalline layer to form polycrystalline silicon spacers on the sidewalls of the gate electrode,
• depositing a conformal layer of dielectric material over the substrate and gate electrode,
• reactive ion etching the conformal layer of dielectric material to form dielectric spacers on the sidewalls of the gate electrode and over the polycrystalline silicon spacers,
• forming deep high concentration source and drain regions of said second conductivity type dopant using the gate electrode and said polycrystalline silicon spacers and said dielectric spacers as a mask, wherein the top portion of the SiO.sub.2 film between the gate electrode sidewall and the polycrystalline silicon spacers is damaged to make it conductive enough to keep the gate electrode and the polycrystalline silicon spacers at the same potential, and
• annealing the substrate to remove crystalline damage.