US 5,497,481 A · Microcomputer computer system having plural programmable timers and preventing memory access operations from interfering with timer start requests

Abstract

A microcomputer system includes: a plurality of DMA data transfer paths for use with a random access memory, at least one of the data transfer paths being set up by a central processing unit under control of a program stored in a read only memory; a plurality of memory locations of the random access memory assigned to the plurality of DMA data transfer paths respectively, each memory location storing time setting data; a timing signal generating unit for outputting a timing signal at predetermined intervals; a DMA control unit for reading out each time setting value from first memory locations through first DMA data transfer paths respectively in synchronism with the timing signal; a detecting unit for detecting whether the time setting value is equal to zero; a plurality of subtraction registers for decrementing the time setting value by one when the time setting value is detected to be unequal to zero; and a writing unit for writing the decremented time setting value into corresponding one of the first memory locations through corresponding one of the first DMA data transfer paths in conjunction with the DMA control unit.

Claims6

Dependent claims

A microcomputer system having a central processing unit (CPU) operating under control of a program stored in a read only memory (ROM), the system comprising:

a) a random access memory (RAM) having a plurality of RAM memory locations for storing respective time setting values;
b) timing signal generating means for providing a timing signal at predetermined intervals;
c) the CPU, including:
1) means for setting initial values into first RAM memory locations;
and
2) means for detecting whether time setting values read from the RAM memory locations are equal to zero;
d) subtraction register means, including a plurality of registers corresponding to the plurality of RAM memory locations, each register for decrementing a respective time setting value by one if the CPU detects the time setting value from the RAM memory location to be unequal to zero, to provide a decremented time setting value;
and
e) direct memory access (DMA) control means including:
1) means for reading out time setting values from the RAM memory locations in synchrony with the timing signal;
and
2) means for writing any decremented time setting value from the substraction register means into a corresponding first RAM memory location.

9 more elements

Dependencies are inferred from the claim text.

Microcomputer computer system having plural programmable timers and preventing memory access operations from interfering with timer start requests

Life of this patent

Microcomputer computer system having plural programmable timers and preventing memory access operations from interfering with timer start requests

Life of this patent

Abstract

Claims6