Universal address generator

A bus interface chip, comprising:

• interface circuitry coupled to a local bus having address leads carrying address signals, and to a system bus having address leads carrying address signals;
• a cache tag for cache operations, said cache tag having address leads carrying address signals;
• and
• a universal address generator coupled to said interface circuitry for providing selected address signals on said local bus and said system bus
• said universal address generator circuitry comprising:
• address register circuitry coupled to said local bus, and said system bus for storing said address signals and for providing selected address signals to said local bus and said system bus;
• saving circuitry coupled to said address register circuitry for saving address signals first loaded in said address register circuitry;
• incrementing circuitry coupled to said saving circuitry for incrementing said saved address signals received from said saving circuitry in accordance with a count input signal;
• said incrementing circuitry providing said incremented address signal to multiplexing circuitry;
• and
• said multiplexing circuitry coupled to and receiving address signals from said local bus, said system bus, said cache tag, and said incrementing circuitry;
• said multiplexing circuitry selectively loading said address signals into said address register circuitry in response to a select input signal.

A method of providing continuous generation of proper addresses on a local bus and a system bus, said local bus and said system bus having address leads carrying address signals, comprising the steps of:

• determining, in response to select signals, whether to load the address signals from a cache tag, said local bus, said system bus, or an incrementing multiplexor into an address register;
• saving address signals first loaded in said address register;
• outputting said address signals to said local bus and said system bus;
• incrementing said saved address signals and
• repeating sequence at said determining step.