US 5,497,465 AGranted

Parallel digital processing system using optical interconnection between control sections and data processing sections

AssigneeNippon Sheet Glass Co., Ltd.

InventorsDanny Chin, Donald J. Sauer, Dietrich Meyerhofer, Kazuo Katsuki

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Abstract

MIMD and pipeline processing is executed by entering data and control signals into processing chips in the form of optical signals, and entering multi-bit information (data and control signals) in parallel and at high speed on the basis of non-coherence of light beams. The efficiency of MIMD processing function has been improved by expanding data transfer buses between processors and output buses in place of data and control signal input buses that have become unnecessary. A processing chip for receiving optical signals consists of a large number of cells dedicated for vector computations, and/or a large number of cells dedicated for vector computations and/or cells dedicated for arithmetic and logical computations. A processing chip for wide applications ranging from vector computations to logical computations by employing a construction combining both processors.

Claims13

Dependent claims

A parallel computer system for executing data processing in parallel and in a pipeline processing mode, said parallel computer system comprising:

a control section including a plurality of controllers;
a processing section including a plurality of processors, each one of the plurality of processors being associated with a respectively different one of the plurality of controllers;
an optical interconnection section for optically coupling each one of said plurality of controllers to the one of said plurality of processors with which it is associated, wherein said optical interconnection section transmits a plurality of optical signals from said one controller to said one processor, said optical signals comprising at least one of a plurality of optical data signals and a plurality of optical control signals;
a first electrical interconnection section, independent of said optical interconnection section, for coupling each one of said plurality of controllers to at least one of said plurality of processors, wherein said first electrical interconnection section transmits electrical control signals from said control section to said processing section;
a second electrical interconnection section, independent of said optical interconnection section and said first electrical interconnection section, coupled to said plurality of processors, for conveying data among said plurality of processors to the substantial exclusion of any control signals, wherein said second electrical interconnection section includes a plurality of inter-processor data transfer buses which interconnect said plurality of processors, wherein said plurality of inter-processor data transfer buses are controlled by a plurality of control signals provided by said control section.

2 more elements

A parallel computer system which performs multi-instruction and multi-data flow processing in a pipeline processing mode, said parallel computer system comprising:

a control section including a plurality of controllers and at least one memory;
a processing section including a plurality of processors each of the plurality of processors coupled to a respectively different one of said plurality of controllers;
an optical interconnection section for optically coupling each of said plurality of controllers to the respective one of said plurality of processors;
and
an electrical interconnection section, independent of said optical interconnection section, for coupling said control section to said processing section, wherein:
a plurality of inter-processor data transfer buses which interconnect said plurality of processors to convey data signals substantially exclusive of any control signals among said plurality of processors, wherein said plurality of inter-processor data transfer buses are controlled by a plurality of control signals provided by said control section;
said optical interconnection section transmits a plurality of optical signals from each of said plurality of controllers to the respective one of said plurality of processors, wherein said optical signals include at least one of a plurality of optical data signals and a plurality of optical control signals;
said electrical interconnection section transmits electrical signals, including a plurality of control signals, from said control section to said processing section;
and
said electrical interconnection section transmits electrical signals, including a plurality of data signals, from said processing section to said control section.

7 more elements

Dependencies are inferred from the claim text.