Apparatus for transferring information between an interrupt producer and an interrupt service environment

An emulation processor operable in an interrogation mode and an emulation mode, said micro processor emulator including a test ROM and a memory, said emulation processor comprising:

• a monitor including monitor code starting at a predetermined ROM address of said test ROM, said monitor code including at least a first command and a next command, said first command and said next command being executable in said interrogation mode;
• a command register;
• said command register storing a jump address;
• a status register;
• a fast break go bit;
• a serial scan port;
• and,
• a set of core registers;
• said processor core registers including a core command register connected to said command register, and a core status register connected to said status register;
• said core command register receiving from said command register said jump address pointing to said predetermined ROM address;
• said emulation processor executing only said first command upon a first condition that said fast break go bit is set;
• said emulation processor executing said first command, modifying a content of said core status register to indicate that said first command has been executed, and executing said next command, upon a second condition that said fast break go bit is not set.

In a emulation processor operable in an interrogation mode and an emulation mode, said emulation processor including a test ROM and a memory, a method comprising steps of:

• A. providing executable code starting at a predetermined ROM address of said test ROM, said code including at least a first command and a next command, said first command and said next command being executable in said interrogation mode;
• B. registering serially received information, said serially received information including a jump address to said predetermined ROM address to start execution of said executable code, said serially received information including a command, said command including a break bit and a fast break go bit;
• C. setting said break bit to cause a break during said emulation mode to exit emulation mode to invoke said monitor to enter said interrogation mode;
• D. sequentially executing said monitor code beginning at said jump address;
• E. executing only said first command upon a first condition that said fast break go bit is set;
• and,
• F. executing said first command, modifying a content of said core status register to indicate that said first command has been executed, and executing said next command, upon a second condition that said fast break go bit is not set.

For use with an emulation processor operable in an interrogation mode and an emulation mode, said micro processor emulator including a test read only memory (ROM) and a memory, the combination comprising:

• a monitor including monitor code starting at a predetermined ROM address of said test ROM,
• said monitor code including at least a first command and a next command, said first command and said next command being executable in said interrogation mode;
• a serial scan port;
• said serial scan port including a command register and a status register;
• said command register including a break bit that indicates a break and a fast break go bit that indicates a fast break;
• said break bit in said command register when set causing a break during said emulation mode to exit emulation mode to invoke said monitor to enter said interrogation mode;
• and,
• a set of processor core registers in said emulation processor;
• said processor core registers including a core command register connected to said command register, and a core status register connected to said status register;
• said core command register receiving from said command register a jump address pointing to said predetermined ROM address;
• said emulation processor executing only said first command upon a first condition that said fast break go bit is set;
• said emulation processor executing said first command, modifying a content of said core status register to indicate that said first command has been executed, and executing said next command, upon a second condition that said fast break go bit is not set.

In an emulation processor operable in an interrogation mode and an emulation mode, said micro processor emulator including a test read only memory (ROM) and a memory, a method comprising steps of:

• A. providing executable code starting at a predetermined ROM address of said test ROM, said code including at least a first command and a next command, said first command and said next command being executable in said interrogation mode;
• B. registering serially received information in a command register and a core status register, said serially received information including a jump address pointing to said predetermined ROM address, said serially received information including a command, said command including a break bit that indicates a break and a fast break go bit that indicates a fast break;
• C. setting said break bit in said command register to cause a break during said emulation mode to exit emulation mode to invoke said monitor to enter said interrogation mode;
• D. receiving from said command register said jump address pointing to said predetermined ROM address;
• E. sequentially executing said monitor code beginning at said jump address;
• F. executing only said first command upon a first condition that said fast break go bit is set;
• and,
• G. executing said first command, modifying a content of said core status register to indicate that said first command has been executed, and executing said next command, upon a second condition that said fast break go bit is not set.