Analog to digital convertor apparatus having an interpolation

A comparator circuit, comprising:

• a means for inputting an input signal and a first reference signal, and outputting a first inverted comparison output current corresponding to said first reference signal and a first non-inverted comparison output current, for inputting said input signal and a second reference signal, and outputting a second inverted comparison output current corresponding to said second reference signal and a second non-inverted comparison output current, and for dividing said first and second inverted comparison output current, and said non-inverted comparison output current in predetermined ratios, respectively;
• and
• an interpolation output means for generating a composite inverted output current by adding said divided first and second inverted comparison output current in a predetermined ratio, and generating a composite non-inverted output current by adding said first and second non-inverted comparison output current in a predetermined ratio, and then said interpolation output means comparing said composite inverted output current and the second non-inverted comparison output current which is in inverted relation to said composite inverted output current, comparing said composite non-inverted output current and the first inverted output current which is in inverted relation to said composite non-inverted output current, and comparing said first inverted output current and said second non-inverted output current, respectively, or said interpolation output means comparing said composite inverted output current and the first non-inverted comparison output current which is in inverted relation to said composite inverted output current, comparing said composite non-inverted output current and the second inverted output current which is in said composite non-inverted output current, and comparing said second inverted output current and said first non-inverted output current, respectively, as a result said interpolation output means obtaining a comparison result of said input signal with a virtual reference signal existing between said first and second reference signals.

A comparator circuit comprising:

• a first differential input stage inputting an input signal and a first reference signal and outputting a first inverted comparison output current corresponding to the first reference signal and a first non-inverted comparison output current;
• a second differential input stage inputting said input signal and a second reference signal outputting a second inverted comparison output current corresponding to said second reference signal and a second non-inverted comparison output current;
• a current divider means for dividing said first and second inverted comparison output current, and said first and second non-inverted comparison output currents in predetermined ratios;
• and an interpolation output means for generating a composite inverted comparison output current by adding said divided first and second inverted comparison output current in a predetermined ratio, or generating a composite non-inverted output current by adding said first and second non-inverted comparison output currents in a predetermined ratio, and comparing said composite inverted output current and the first and second non-inverted comparison output currents, which are in inverted relation to said composite inverted output current, or comparing said composite non-inverted output current and the first and second inverted output currents, which are in inverted relation to said composite non-inverted output current, respectively, as a result said interpolation output means obtaining a result of comparison of said input signal to a virtual reference signal existing between said first and second reference signals.

A serial/parallel analog-to-digital convertor circuit for performing the operation of conversion from analog signals to digital data in a plurality of stages, wherein:

• a lower comparison section used for the operation of conversion comprising:
• a first differential input stage for inputting an input signal and a first reference signal, and outputting a first inverted comparison output current corresponding to said first reference signal and a first non-inverted comparison output current;
• a second differential input stage for inputting said input signal and a second reference signal, and outputting a second inverted comparison output current to said second reference signal and a second non-inverted comparison output current;
• a current divider means for dividing said first and second inverted comparison output current into the non-inverted comparison output current in predetermined ratios, respectively;
• and
• an interpolation output means for generating a composite inverted output current by adding said divided first and second inverted comparison output current in a predetermined ratio, generating a composite non-inverted output current by adding said first and second non-inverted comparison output current in a predetermined ratio, and then comparing said composite inverted output current and second non-inverted comparison output current, which is inverted relative to said composite inverted output current, said composite non-inverted output current and the first inverted output current, which is inverted relative to said composite non-inverted output current, said first inverted output current and said second non-inverted output current, respectively, or said interpolation output means comparing said composite inverted output current and first non-inverted comparison output current which is in inverted relation to said composite inverted output current, said composite non-inverted output current and second inverted output current which is in inverted relation to said composite non-inverted output current, said second inverted output current and said first non-inverted output current, respectively, as a result said interpolation output means obtaining a result of comparison of the input signal to a virtual reference signal existing between the first and second reference signals.

A serial/parallel analog-to-digital convertor circuit for performing the operation of conversion from analog signals to digital data in a plurality of stages, wherein:

• a lower comparison section used for the operation of conversion comprising:
• means for inputting an input signal and a first reference signal, and outputting a first inverted comparison output current corresponding to said first reference signal and a first non-inverted comparison output current, inputting said input signal and a second reference signal and outputting a second inverted comparison output current to said second reference signal and a second non-inverted comparison output current, and dividing said first and second inverted comparison output current into the non-inverted comparison output current in predetermined ratios, respectively;
• and
• an interpolation output means for generating a composite inverted output current by adding said divided first and second inverted comparison output current in a predetermined ratio, generating a composite non-inverted output current by adding said first and second non-inverted comparison output current in a predetermined ratio, and then comparing said composite inverted output current and second non-inverted comparison output current, which is inverted to said composite inverted output current, said composite non-inverted output current and the first inverted output current, which is inverted to said composite non-inverted output current, said first inverted output current and said second non-inverted output current, respectively, or said interpolation output means comparing said composite inverted output current and first non-inverted comparison output current which is in inverted relation to said composite inverted output current, said composite non-inverted output current and second inverted output current which is in inverted relation to said composite non-inverted output current, said second inverted output current and said first non-inverted output current, respectively, as a result said interpolation output means obtaining a result of comparison of the input signal to a virtual reference signal existing between the first and second reference signals.