Solid state power controller with power switch protection apparatus

Apparatus for limiting current through at least one MOSFET to a selected level comprising:

• at least one MOSFET, each MOSFET having a drain, a source and a gate,
• a shunt resistor serially connected to the drain-source of each MOSFET,
• a comparator having an inverting terminal, a non-inverting terminal and an output, the shunt resistor coupled to the non-inverting terminal, a reference voltage coupled to the inverting terminal,
• a first current source connected between a supply voltage and each MOSFET gate and a second current source connected between each MOSFET gate and ground, the output of the comparator connected to a third current source providing a linear relationship between the output of the comparator and the value of the second current source between one extreme where the value of the second current source will be zero when the output of the comparator is low causing current to be conducted from the first current source to each gate and an opposite extreme where current will flow from the first current source and out from each gate to the second current source when the output of the comparator is high whereby when the voltage at the non-inverting terminal of the comparator exceeds the voltage at the inverting terminal the output of the comparator will increase causing current to flow from each gate causing the source-drain resistance to increase and lower the load current and voltage across the shunt.