Semiconductor memory device having separately biased wells for isolation

A semiconductor integrated circuit device comprising:

• a semiconductor substrate having a main surface of a first conductivity type;
• a first semiconductor region of a second conductivity type, opposite to said first conductivity type, formed in said main surface of said semiconductor substrate;
• a second semiconductor region of said first conductivity type formed in said first semiconductor region;
• a first MISFET of said second conductivity type formed in a first region of said main surface of said semiconductor substrate, said first region being different from said first semiconductor region;
• a second MISFET of said second conductivity type formed in a surface of said second semiconductor region;
• a first voltage device to apply a first voltage to said first semiconductor region;
• a second voltage device to apply a second voltage to said second semiconductor region;
• and
• a third voltage device to apply a third voltage to said main surface of said semiconductor substrate,
• such that said first voltage is applied to said first semiconductor region for electrically isolating said second semiconductor region from said main surface of said semiconductor substrate, and wherein a value of said second voltage is different from that of said third voltage.

A semiconductor integrated circuit device comprising:

• a semiconductor substrate having a main surface of a first conductivity type;
• a first semiconductor region of a second conductivity type, opposite to said first conductivity type, formed in said main surface of said semiconductor substrate so as to form a first PN junction between said first semiconductor region and said main surface of said semiconductor substrate;
• a second semiconductor region of said first conductivity type formed in said first semiconductor region so as to form a second PN junction between said second semiconductor region and said first semiconductor region;
• a first MISFET of said second conductivity type formed in a first region of said main surface of said semiconductor substrate, said first region being different from said first semiconductor region;
• and
• a second MISFET of said second conductivity type formed in a surface of said second semiconductor region,
• wherein a first voltage is to be applied to said first semiconductor region, a second voltage is to be applied to said second semiconductor region, and a third voltage is to be applied to said main surface of said semiconductor substrate, so that said second PN junction is reverse biased by said first and second voltages, and said first PN junction is reverse biased by said first and second voltages, and wherein a value of said second voltage is to be different from that of said third voltage.

A method of operating a semiconductor integrated circuit device, the semiconductor integrated circuit device comprising a semiconductor substrate having a main surface of a first conductivity type;

• a first semiconductor region of a second conductivity type, opposite to said first conductivity type, formed in said main surface of said semiconductor substrate;
• a second semiconductor region of said first conductivity type, formed in said first semiconductor region;
• a first MISFET of said second conductivity type formed in a first region of said main surface of said semiconductor substrate, said first region being different from said first semiconductor region;
• and a second MISFET of said second conductivity type formed in a surface of said second semiconductor region, said method comprising the steps of:
• applying a first voltage to said first semiconductor region;
• applying a second voltage to said second semiconductor region;
• and
• applying a third voltage to said main surface of said semiconductor substrate,
• wherein said first voltage electrically isolates said second semiconductor region from said main surface of said semiconductor substrate, and wherein a value of said second voltage is different from that of said third voltage.

A method of operating a semiconductor integrated circuit device, the semiconductor integrated circuit device comprising a semiconductor substrate having a main surface of a first conductivity type;

• a first semiconductor region of a second conductivity type, opposite to said first conductivity type, formed in said main surface of said semiconductor substrate so as to form a first PN junction between said first semiconductor region and said main surface of said semiconductor substrate;
• a second semiconductor region of said first conductivity type formed in said first semiconductor region so as to form a second PN junction between said second semiconductor region and said first semiconductor region;
• a first MISFET of said second conductivity type formed in a first region of said main surface of said semiconductor substrate, said first region being different from said first semiconductor region;
• and a second MISFET of said second conductivity type formed in a surface of said second semiconductor region, said method comprising the steps of:
• applying a first voltage to said first semiconductor region;
• applying a second voltage to said second semiconductor region;
• and
• applying a third voltage to said main surface of said semiconductor substrate,
• wherein said second PN junction is reverse biased by said first and second voltages, and said first PN junction is reverse biased by said first and second voltages, and wherein a value of said second voltage is different from that of said third voltage.