Sealed vacuum electronic devices

A method of manufacturing a sealed vacuum field emission device, comprising the steps of:

• forming a first dielectric layer over a silicon substrate;
• forming a grid metal layer over said first dielectric layer;
• forming a second dielectric layer over said grid metal layer;
• patterning said second dielectric layer to provide an opening to said grid metal layer;
• patterning said grid metal layer in area define by said opening;
• removing said first dielectric layer in a region defined by said opening and also a portion of said first dielectric layer under said grid metal layer;
• narrowing the upper portion of said opening;
• and
• forming in a vacuum environment a second metal layer over said second dielectric layer and over said narrowed opening simultaneously forming a field emitter tip on said silicon substrate, thus forming a field emission device that is in a sealed vacuum.

A method of forming a vacuum in a region between a field emission tip and a metal anode, comprising the steps of:

• forming said field emission tip on a silicon substrate;
• forming a first dielectric layer over said field emission tip and over said silicon substrate;
• planarizing said first dielectric layer to provide a smooth top surface co-planar with the top of said field emission tip;
• forming a grid metal layer over said first dielectric layer;
• forming a second dielectric layer over said grid metal layer;
• pattering said second dielectric layer to provide an opening, vertically located over said field emission tip, to said grid metal layer;
• patterning said grid metal layer in area defined by said opening;
• removing said first dielectric layer in the region defined by said opening and also a portion of said first dielectric layer under said grid metal layer;
• narrowing the upper portion of said opening;
• and
• forming said vacuum by depositing in a vacuum environment a second metal layer over said second dielectric layer and over said narrowed opening.