Synchronous DRAM memory module
AssigneeNEC Corporation
InventorKenji Sugahara
Life of this patent
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Abstract
A clock driver is mounted in the center of a printed-circuit board, and a plurality of synchronous DRAMs are arranged on left and right hand sides of the clock driver in different banks. A clock signal is supplied from the clock driver to the synchronous DRAMs via clock wires. Wiring distances for supplying the clock pulse from the clock driver to a pair of synchronous DRAMs included in the different banks are determined to nearly equal to prevent a time difference of a timing signal in a data recording and reproducing operations of the respective banks and to solve a skew mismatching.
Claims11
A synchronous DRAM memory module, comprising:
- a plurality of banks on a printed-circuit board;
- a plurality of synchronous DRAMs separately arranged in the banks;
- and
- a clock driver having terminals for supplying a clock signal to either a pair of or a set of synchronous DRAMs included in the different banks from one terminal via clock wires so that clock wire distances from one terminal of the clock driver to either the pair of or the set of synchronous DRAMs being determined to nearly equal.
A synchronous DRAM memory module, comprising:
- clock signaling means for supplying a clock signal;
- a first DRAM pair having a first synchronous DRAM, a second synchronous DRAM, a first clock wire, and a second clock wire;
- said first clock wire connecting said first synchronous DRAM with said second synchronous DRAM, and having a center point which is substantially equidistant, electrically, from said first and said second synchronous DRAMS;
- and
- said second clock wire connecting said center point with said clock signaling means.
Dependencies are inferred from the claim text.