Integrated circuit physical design automation system utilizing optimization process decomposition and parallel processing

A physical design automation system for producing an optimized cell placement for an integrated circuit chip, comprising:

• a decomposer for decomposing a placement optimization methodology into a plurality of cell placement optimization processes;
• a plurality of parallel processors for performing said optimization processes simultaneously on input data representing said chip;
• a recomposer for recomposing results of said optimization processes and producing an optimized cell placement corresponding thereto;
• and
• a controller for analyzing a fitness of said optimized cell placement and controlling the parallel processors to selectively repeat performing said optimization processes for further optimizing said optimized cell placement if said fitness does not satisfy a predetermined criterion, in which:
• the process decomposer generates a plurality of initial placements;
• the parallel processors perform said cell optimization processes on said initial placements to produce a plurality of processed cell placements respectively;
• the process recomposer designates a processed cell placement having a highest fitness as said optimized cell placement;
• and
• said optimization processes comprise genetic crossover between said initial placements.

A physical design automation system for producing an optimized cell placement for an integrated circuit chip, comprising:

• a decomposer for decomposing a placement optimization methodology into a plurality of cell placement optimization processes;
• a plurality of parallel processors for performing said optimization processes simultaneously on input data representing said chip;
• a recomposer for recomposing results of said optimization processes and producing an optimized cell placement corresponding thereto;
• and
• a controller for analyzing a fitness of said optimized cell placement and controlling the parallel processors to selectively repeat performing said optimization processes for further optimizing said optimized cell placement if said fitness does not satisfy a predetermined criterion, in which:
• said optimization processes comprise different algorithms respectively;
• the processor generates an initial placement;
• the parallel processors perform said cell optimization processes on said initial placement to produce a plurality of processed cell placements respectively;
• and
• the process recomposer designates a processed cell placement having highest fitness as said optimized cell placement.

A physical design automation system for producing an optimized cell placement for an integrated circuit chip, comprising:

• a decomposer for decomposing a placement optimization methodology into a plurality of cell placement optimization processes;
• a plurality of parallel processors for performing said optimization processes simultaneously on input data representing said chip;
• a recomposer for recomposing results of said optimization processes and producing an optimized cell placement corresponding thereto;
• and
• a controller for analyzing a fitness of said optimized cell placement and controlling the parallel processors to selectively repeat performing said optimization processes for further optimizing said optimized cell placement if said fitness does not satisfy a predetermined criterion;
• in which the process decomposer generates an initial placement, divides cells of said initial placement into a plurality of nets of interconnected cells and assigns the processors to perform said optimization processes on said nets respectively.

A physical design automation system for producing an optimized cell placement for an integrated circuit chip, comprising:

• a decomposer for decomposing a placement optimization methodology into a plurality of cell placement optimization processes;
• a plurality of parallel processors for performing said optimization processes simultaneously on input data representing said chip;
• a recomposer for recomposing results of said optimization processes and producing an optimized cell placement corresponding thereto;
• and
• a controller for analyzing a fitness of said optimized cell placement and controlling the parallel processors to selectively repeat performing said optimization processes for further optimizing said optimized cell placement if said fitness does not satisfy a predetermined criterion;
• in which the process decomposer generates an initial placement, divides cells of said initial placement into a plurality of groups of cells in accordance with a predetermined hierarchial organization and assigns the processors to perform said optimization processes on said groups respectively.