High frequency multiplier

Abstract

A high frequency multiplier for use in modulation/demodulation circuits, frequency converters or the like. The high frequency multiplier is used at high frequency band, and has a simplified configuration. The high frequency multiplier is formed of a pair of first transistor and a second transistor which are connected differentially to each other; a pair of third and fourth transistors which are connected differentially to each other; a constant current source connected to emitters or sources of the first and second transistors; an impedance circuit connected between a node at which the collector or drain of the first transistor is connected to the emitter or source of the third transistor and a node at which the collector or drain of the second transistor is connected to the emitter or source of the fourth transistor; and a load impedance circuit connected to the collectors or drains of the third and fourth transistors. The third transistor or fourth transistor receives a first input signal at the base or gate, and the first transistor or second transistor receives a second input signal at the base or gate. An output signal having product information of the first input signal and the second input signal is outputted from the node at which the collectors or drains of the third and fourth transistors are connected to the load impedance circuit.

Dependencies are inferred from the claim text.