CMOS input with Vcc compensated dynamic threshold
AssigneePhilips Electronics North America Corporation
InventorBrian Martin
Life of this patent
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Abstract
A CMOS inverter circuit is provided which includes a compensation circuit which modifies the input threshold of the inverter depending on changes in the supply voltage. The inverter includes a standard CMOS inverter, current boosting circuitry and a further inverter. The input of the inverter is coupled to the current boosting circuitry and the input of the further inverter. The current boosting circuitry is also coupled to one of the supply voltages. The current boosting circuitry is operative to effectively change the PMOS to NMOS ratio of the inverter to maintain a substantially constant input threshold to counter the effect of any change in supply voltage.
Claims8
An inverter circuit coupled between a first voltage supply and a second voltage supply, comprising:
- a first inverter having an input terminal and an output terminal and including a first transistor having a control electrode, a first flow electrode and a second flow electrode and a second transistor having a control electrode, a first flow electrode and a second flow electrode, said first flow electrode of said first transistor coupled to said first voltage supply, said second flow electrode of said first transistor and said first flow electrode of said second transistor coupled to said output terminal, said second flow electrode of said second transistor coupled to said second voltage supply, said both control electrodes coupled to said input terminal, said first inverter having a predetermined switching threshold;
- current boosting means for increasing current between said first voltage supply and said output terminal, said current boosting means having a first input, a second input coupled to said input terminal and a main current path coupled between said first voltage supply and said output terminal;
- and
- a second inverter having an input coupled to said input terminal and an output coupled to said first input of said current boosting means, said second inverter having a switching threshold greater than said switching threshold of said first inverter.
An inverter circuit coupled between a first voltage supply and a second voltage supply, comprising:
- a first inverter having an input terminal and an output terminal and including a first transistor having a control electrode, a first flow electrode and a second flow electrode and a second transistor having a control electrode, a first flow electrode and a second flow electrode, said first flow electrode of said first transistor coupled to said first voltage supply, said second flow electrode of said first transistor and said first flow electrode of said second transistor coupled to said output terminal, said second flow electrode of said second transistor coupled to said second voltage supply, said both control electrodes coupled to said input terminal, said first inverter having a predetermined switching threshold;
- current boosting means for increasing current between said second voltage supply and said output terminal, said current boosting means having a first input, a second input coupled to said input terminal and a main current path coupled between said second voltage supply and said output terminal;
- and
- a second inverter having an input coupled to said input terminal and an output coupled to said first input of said current boosting means, said second inverter having a switching threshold less than said switching threshold of said first inverter.
A circuit including a logic gate having a predetermined threshold, said logic gate comprising:
- an input terminal for receiving an input signal;
- a first supply node and a second supply node for connection to first and second supply voltage sources;
- first current path means between the first supply node and the output terminal for charging the output terminal in response to the input signal;
- second current path means between the output terminal and the second supply node for discharging the output terminal in response to the input signal;
- a further current path having first and second switches coupled in parallel to one of the first current path means and the second current path means;
- first control means responsive to the input signal for turning on the second switch when the first current path means is active;
- and
- second control means responsive to the input signal for turning on the first switch at a time independent of said second switch.
Dependencies are inferred from the claim text.