Chemical mechanical planarization of shallow trenches in semiconductor substrates

A method of fabricating an integrated circuit device comprising the steps of:

• a. forming trenches on a face of a silicon substrate, the regions between said trenches at said face defining active region mesas;
• b. forming a first layer of conformal oxide film on said face to fill in said trenches to a level about level with the top of said active region mesas;
• c. forming a layer of polysilicon etch-stop on said first layer of conformal oxide film;
• d. forming a second layer of conformal polish-assist oxide film on said polysilicon layer at a thickness such that the top of the second oxide film above said trenches is about level with the top of the first conformal oxide film over the active area mesas;
• e. patterning resist blocks onto said second layer of conformal oxide into depressions of said second layer of conformal oxide film above said trenches;
• f. forming oxide blocks under said resist blocks by etching said second conformal oxide film;
• g. stripping said resist blocks away from said oxide blocks;
• h. polishing back said second conformal oxide film, said polysilicon layer, and said first conformal oxide film, to the top of said active region mesas forming a globally planar surface.