Single-etch stop process for the manufacture of silicon-on-insulator substrates

A single-etch stop process for the manufacture of silicon-on-insulator substrates comprising

• forming a silicon-on-insulator bonded substrate comprising a handle wafer, a device wafer, a device layer having a thickness of between about 0.5 and 50 micrometers, and an oxide layer with the device layer being between the device wafer and the oxide layer and the oxide layer being between the device layer and the handle wafer, the device wafer having a boron concentration of at least about 1.times.10.sup.18 boron atoms/cm.sup.3 and a resistivity of about 0.01 to about 0.02 obm-cm,
• grinding away a portion of the device wafer from the silicon-on-insulator bonded substrate and polishing the ground surface of the device wafer, the device wafer having a thickness of between about 10 and about 30 micrometers, a total thickness variation across the surface of the wafer of less than about 2 micrometers, and a defect-free surface after the ground surface is polished,
• etching away the defect-free surface of the device wafer to expose the device layer, and
• polishing the exposed device layer using an ammonia stabilized colloidal silica slurry to produce a silicon-on-insulator substrate having a device layer the total thickness variation of which does not exceed 10% of the maximum thickness of the device layer, the amount of silicon being removed from the exposed device layer during the polishing step being no more than about 200 nm of the thickness of the exposed device layer.