Power efficient RAM disk and a method of emulating a rotating memory disk

An apparatus for storing data in and reading data from a memory system, composed of a plurality of semiconductor memory integrated circuits, in units of data commonly exchanged with a rotating memory device, the apparatus comprising:

• means for reading a cluster of units of data stored in said memory system;
• means for decompressing said cluster of units of data into a multiplicity of other units of data;
• means for merging said one or more units of data to be stored with said multiplicity of other units of data stored in said memory system to form a decompressed cluster of units of data;
• data compression means for compressing said decompressed cluster of units of data to produce a compressed cluster of units of data;
• error correction coding means for performing error correction coding of said compressed cluster of units of data;
• and
• means for storing said compressed cluster of units of data in said memory system, a multiplicity of contiguous data bits of the compressed cluster of units of data being stored in a single memory integrated circuit.

An apparatus for transferring data between a processor and a memory, said memory comprising a plurality of semiconductor memory integrated circuits, said apparatus comprising:

• means for locating available memory space in said memory to store in said memory a unit of data transmitted by said processor;
• means for reading a cluster of units of data stored in said memory;
• means for decompressing said cluster of units of data into a multiplicity of other units of data;
• means for merging said unit of data transmitted by said processor with said multiplicity of other units of data to form a decompressed cluster of data;
• means for compressing said decompressed cluster of data to form a compressed cluster of data;
• means for error correction coding said compressed cluster of data to form a coded cluster of data;
• and
• means for storing said coded cluster of data in a plurality of fragments in said memory,
• wherein said apparatus and said memory emulate a rotating memory device.

A method for transferring data between a processor and a memory emulating a rotating memory device, said memory comprising a plurality of semiconductor memory integrated circuits, said method comprising the steps of:

• locating available space in said memory to store in said memory a unit of data transmitted by said processor;
• reading a cluster of units of data stored in said memory;
• decompressing said cluster of units of data into a multiplicity of other units of data;
• merging said unit of data transmitted by said processor with said multiplicity of other units of data to form a decompressed cluster of data;
• compressing said cluster of data to form a compressed cluster of data;
• error correction coding said compressed cluster of data to form a coded cluster of data;
• and
• storing said coded cluster of data in a plurality of fragments in said memory.

An apparatus for storing data in and reading data from a memory system, composed of a plurality of semiconductor memory integrated circuits, in units of data commonly exchanged with a rotating memory device, the apparatus comprising:

• an interface logic module coupled to said memory system;
• a compression logic circuit coupled to said interface logic module;
• an error correction logic circuit coupled to said compression logic circuit and said memory system;
• a decompression logic circuit coupled to said error correction logic circuit and said interface logic module;
• and
• a processor coupled to said interface logic module, said compression logic circuit, said error correction logic circuit and said decompression logic circuit, wherein, to store one or more units of data, said processor:
• causes said error correction logic circuit to read a cluster of units of data stored in said memory system;
• causes said decompression logic circuit to decompress said cluster of units of data into a multiplicity of other units of data;
• merges said one or more units of data with said multiplicity of other units of data to form a decompressed cluster of units of data;
• causes said compression logic circuit to compress said decompressed cluster of units of data to produce a compressed cluster of units of data;
• causes said error correction logic circuit to perform error correction coding of said compressed cluster of units of data to form a coded cluster of units of data;
• and
• causes said interface logic module to store said coded cluster of units of data in said memory system, a multiplicity of contiguous data bits of the coded cluster of units of data being stored in a single memory integrated circuit.