Dual differential trans-impedance sense amplifier and method
AssigneeAtmel Corporation
InventorEmil Lambrache
Life of this patent
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AssigneeAtmel Corporation
InventorEmil Lambrache
Estimating the term…
A sense amplifier arrangement having two trans-impedance amplifiers and one precision current inverting amplifier, which receive respective first and second sense currents from core memory and a reference current from a matched reference cell. The current inverting amplifier receives the reference current and produces first and second output currents which are summed with the respective first and second sense currents for input to first and second trans-impedance amplifiers which are capable to sink or source current at their inputs as current summing nodes and are effective for producing first and second single ended voltages which are input into respective first and second comparators to produce cmos level output voltages representative of the memory states of the respective first and second memory cells. The corresponding current inverting and trans-impedance amplifiers and comparators are matched by being biased by the same source and because they have respective output voltages with swings around a selected trip point.
A sense amplifier circuit connected to a semiconductor memory including a plurality of memory core cells and reference cells interspersed therewith, and bit lines connected to said memory core cells and reference cells, said sense amplifier circuit comprising:
A sense amplifier circuit connected to a semiconductor memory, comprising:
A method of memory cell sense determination by combining sense and reference currents received respectively from a core memory cell in a semiconductor memory and from a reference cell in said semiconductor memory, comprising the steps of:
Dependencies are inferred from the claim text.