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US 5,492,848 AGranted
Stacked capacitor process using silicon nodules
AssigneeUnited Microelectronics Corp.
InventorsWater Lur, Jiunn-Yuan Wu, Cheng-Hen Huang
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Abstract
A technique for making a MOST capacitor for use in a DRAM cell utilizes silicon nodules after metal etching. The silicon nodules are used as a mask to selectively form deep grooves in a polysilicon electrode of the capacitor.
Claims4
A method for making a MOST capacitor for use in a DRAM cell comprising the steps of
- (a) forming a conductive polysilicon layer on a silicon substrate,
- (b) forming an oxide layer on the polysilicon layer,
- (c) forming a metal layer on the oxide layer,
- (d) forming silicon precipitates in the metal layer,
- (e) reactive ion etching said metal layer to form silicon nodules on the oxide layer,
- (f) using the silicon nodules as a mask, reactive ion etching the oxide layer to form a plurality of oxide islands,
- (g) using the oxide islands as a mask, etching the polysilicon layer to form a plurality of pillars,
- (h) forming a capacitor dielectric layer on the etched polysilicon layer, and
- (i) forming a second polysilicon layer on the dielectric layer.
6 more elements
Dependencies are inferred from the claim text.