US 5,492,847 A · Counter-implantation method of manufacturing a semiconductor device with self-aligned anti-punchthrough pockets

Abstract

A method of processing a semiconductor device shapes a layer buried within a substrate of the semiconductor device. This layer has a conductivity the same as that of the substrate but has a higher doping level. In this process, a region of the layer is selected and ions of an opposite conductivity to the selected layer are counter-implanted in the region so that the doping level of the region is substantially canceled. A region of the layer adjacent to the counter-implanted region retains a higher doping level. Alternative techniques are employed to protect the doped region against the counter-implant. In a first approach, the layer is doped and subsequently a mask is formed on the surface of the substrate. The mask is furnished by a part of the semiconductor device, such as a spacer which is connected to the gate electrode after the dopant layer is formed in the substrate. After the mask is formed, ions are counter-implanted with the mask protecting the doped region. In a second approach, both the ion implant forming the doped layer and the counter-implant are performed after masking structures are formed, however the ion implant is a large-angle implant which implants ions beneath the masking structure while the counter-implant is a perpendicular implant so that regions beneath the masking structure are protected from cancellation.

Claims25

Dependent claims

A method of shaping a layer buried within a substrate of a semiconductor device, the layer having a conductivity the same as the substrate and having a higher doping level than the substrate, the method comprising the steps of:

selecting a region of the layer;
and
counter-implanting ions of a conductivity opposite the conductivity of the layer into the selected region of the layer so that the layer doping level in the selected region is substantially canceled and a region of the layer outside the selected region having the higher doping level remains buried in the substrate.

A method of fabricating a semiconductor device, comprising the steps of:

forming two lightly doped implant regions of a first conductivity type each on a side of a gate electrode in a semiconductor substrate of a second conductivity type using the gate electrode as a mask structure, the gate electrode being coupled to the semiconductor substrate surface;
forming two anti-punchthrough implant regions, having the second conductivity type and a higher doping level than the semiconductor substrate doping level, each buried in the semiconductor substrate under the lightly doped implant regions on a side of the gate electrode using the gate electrode as a mask structure;
counter-implanting ions of the first conductivity type into regions of the two anti-punchthrough implant regions so that the anti-punchthrough doping level in the regions is substantially canceled and two anti-punchthrough implant pockets remain buried in the semiconductor substrate substantially beneath the edges of the gate electrode;
and
forming source and drain implant regions of the first conductivity type in the semiconductor substrate using the gate electrode as a mask structure.

2 more elements

Dependencies are inferred from the claim text.

Counter-implantation method of manufacturing a semiconductor device with self-aligned anti-punchthrough pockets

Life of this patent

Counter-implantation method of manufacturing a semiconductor device with self-aligned anti-punchthrough pockets

Life of this patent

Abstract

Claims25