On-chip operation control for memories

A circuit for controlling operation of a memory array formed on a single integrated-circuit chip in response to microcodes from an external source, said circuit comprising:

• a control-read-only-memory on said chip, said control-read-only-memory storing instructions for performing said operation;
• and
• a microsequencer on said chip to perform, in response to said microcodes from said external source, said operation of said memory array according to said instructions programmed in said control-read-only-memory;
• wherein said microsequencer includes a test multiplexer for receiving microcodes from said external source and for coupling a first signal to an instruction decoder;
• said instruction decoder also receiving an operation code from said control-read-only-memory, said instruction decoder controlling a subroutine stack;
• a program-counter multiplexer for receiving a second signal from said subroutine stack and a third signal from an incrementer, said program-counter multiplexer furnishing a fourth signal to said control-read-only-memory;
• said incrementer taking said fourth signal and generating said third signal as a next microcode address.

Control means for controlling operation of a memory array formed on a single integrated-circuit chip in response to microcodes from an external source, said means comprising:

• control-read-only-memory means on said chip;
• programming instructions means on said chip for performing said operation in said control-read-only-memory means;
• and
• microsequencer means on said chip to perform, in response to said microcodes from said external source, said operation of said memory array according to said instructions programmed in said control-read-only-memory means;
• wherein said microsequencer means includes test-multiplexer means for receiving microcodes from said external source and for coupling a first signal to instruction-decoder means;
• said instruction-decoder, means also receiving an operation code from said control-read-only-memory means, said instruction-decoder means controlling subroutine-stack means:
• program-counter-multiplexer means for receiving said operation code, for receiving a second signal from said subroutine-stack means, and for receiving a third signal from incrementer-means, said program-counter-multiplexer means furnishing a fourth signal to said control-read-only-memory means;
• and said incrementer means taking said fourth signal from said program-counter-multiplexer means and, from said fourth signal, generating said third signal as a next microcode address.