Integrated structure current sensing resistor for power MOS devices, particularly for overload self-protected power MOS devices
AssigneeConsorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
InventorRaffaele Zambrano
Life of this patent
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Abstract
In integrated structure sensing resistor for a power MOS device consists of a doped region extending from a deep body region of at least one cell of a first plurality of cells, constituting a main power device, to a deep body region of a corresponding cell of a second smaller plurality of cells constituting a current sensing device.
Claims33
An integrated structure current sensing resistor for a power MOS device comprising a main power device and a current sensing device respectively made up of a first plurality of a second plurality of identical cells arranged in an array, each of them comprising a deep body region of a first conductivity type obtained in a semiconductor material of a second conductivity type, a lateral channel region of said first conductivity type and a source region of said second conductivity type extending partially in said deep body region and partially in said lateral channel region, an conductive gate layer, insulated from a top surface of the semiconductor material by a thin gate oxide layer superimposed over said channel region, the deep body region and the source region of each cell of the first plurality being electrically connected to each other, and the deep body region and the source region of each cell of the second plurality being electrically connected to each other, by means of respective first and second superimposed conductive source electrodes, characterized in that said integrated structure sensing resistor is formed in at least one doped region which is an interconnecting portion integrally coupled to the deep body region of at least one cell of the first plurality and of the deep body region of a corresponding cell of the second plurality, said sensing resistor having a first end contacted by said first source electrode through a same contact opening through which the first source electrode contacts the source and deep body regions of said at least one cell of the first plurality and a second end contacted by said second source electrode through a same contact opening through which the second source electrode contacts the source and deep body regions of said corresponding cell of the second plurality.
An integrated protection circuit for protecting an integrated power MOS device comprising:
- a semiconductor substrate;
- a first plurality of cells forming a MOS power device;
- a second plurality of cells forming a current sensing device;
- each of the cells having a body region of a first conductivity type formed in an upper surface of a layer of a second conductivity type that is formed on an upper surface of the semiconductor substrate, a channel region of the first conductivity type formed in the upper surface of the layer, and a source region of the second conductivity type formed and extending partially in the body region and partially in the channel region;
- and
- a first interconnecting doped region of one of the first and second conductivity types forming a first resistor, the first interconnecting doped region connected to, and immediately contiguous with the body region of a least one cell of the first plurality of cells and to the body region of a corresponding cell of the second plurality of cells within the substrate.
An integrated structure current sensing resistor for a power MOS device comprising:
- a main power device and a current sensing device respectively made up of a first plurality and a second plurality of identical cells arranged in an array, each of them comprising a deep body region of a first conductivity type obtained in a semiconductor material of a second conductivity type, a lateral channel region of said first conductivity type and a source region of said second conductivity type extending partially in said deep body region and partially in said lateral channel region, a conductive gate layer, insulated from a top surface of the semiconductor material by a thin gate oxide layer superimposed over said channel region, the deep body region and the source region of each cell of the first plurality being electrically connected to each other, and the deep body region and the source regions of each cell of the second plurality being electrically connected to each other, by means of respective first and second superimposed conductive source electrodes, said integrated structure sensing resistor having a plurality of parallel connected doped regions, each being an interconnecting portion with the deep body region of a respective cell of the first plurality of cells and of the deep body region of a corresponding cell of the second plurality of cells.
An integrated protection circuit for protecting an integrated power MOS device comprising:
- a semiconductor substrate;
- a first plurality of cells forming a MOS power device;
- a second plurality of cells forming a current sensing device;
- each of the cells having a body region of a first conductivity type formed in an upper surface of a layer of a second conductivity type that is formed on an upper surface of the semiconductor substrate, a channel region of the first conductivity type formed in the upper surface of the layer, and a source region of the second conductivity type formed and extending partially in the body region and partially in the channel region;
- and
- first and second interconnecting doped regions of one of the first and second conductivity types forming respective first and second resistors, the first and second interconnecting doped regions connected to, and immediately contiguous with, the body region of at least one cell of the first plurality of cells and to the body region of a corresponding cell of the second plurality of cells, the first interconnecting doped region formed within the substrate, and the second interconnecting doped region formed in an upper surface of the first interconnecting doped region.
An integrated protection circuit for protecting an integrated power MOS device comprising:
- a semiconductor substrate;
- a first plurality of cells forming a MOS power device;
- a second plurality of cells forming a current sensing device;
- each of the cells having a body region of a first conductivity type formed in an upper surface of a layer of a second conductivity type that is formed on an upper surface of the semiconductor substrate, a channel region of the first conductivity type formed in the upper surface of the layer, and a source region of the second conductivity type formed and extending partially in the body region and partially in the channel region;
- a first interconnecting doped region of the first conductivity type forming a first resistor, the first interconnecting doped region connected to, and immediately contiguous with, the body region of at least one cell of the first plurality of cells and to the body region of a corresponding cell of the second plurality of cells within the substrate;
- and
- an oxide layer formed over the first interconnecting doped region.
An integrated protection circuit for protecting an integrated power MOS device comprising:
- a semiconductor substrate;
- a first plurality of cells forming a MOS power device;
- a second plurality of cells forming a current sensing device;
- each of the cells having a body region of a first conductivity type formed in an upper surface of a layer of a second conductivity type that is formed on an upper surface of the semiconductor substrate, a channel region of the first conductivity type formed in the upper surface of the layer, and a source region of the second conductivity type formed and extending partially in the body region and partially in the channel region;
- and
- a first interconnecting doped region of the first conductivity type forming a first resistor, the first interconnecting doped region connected to, and immediately contiguous with, the body region of a least one cell of the first plurality of cells and to the body region of a corresponding cell of the second plurality of cells, the first interconnecting doped region extending laterally within the substrate a lateral distance substantially greater than a lateral distance extended by the body region of at least the second plurality of cells.
Dependencies are inferred from the claim text.