LDMOS transistor with self-aligned source/backgate and photo-aligned gate

A method of forming a circuit device in a semiconductor layer comprising the steps of:

• exposing a region of said semiconductor layer;
• implanting p-type dopants into each said exposed region of said semiconductor layer, said p-type dopants having a first diffusion rate;
• implanting n-type dopants into said exposed region of said semiconductor layer, said n-type dopants having a second diffusion rate, said second diffusion rate different than said first diffusion rate;
• and
• heating said exposed region such that a first doped region is formed within a second doped region wherein said first doped region is doped with dopants of a first conductivity type and said second doped region is doped with dopants of a second conductivity type, said first conductivity type being different than said second conductivity type;
• wherein said circuit device comprises a D-well region of a vertical DMOS device;
• said D-well region comprising said first and second doped regions.

A method of forming a circuit device in a semiconductor layer comprising the steps of;

• exposing a region of said semiconductor layer;
• implanting p-type dopants into said exposed region of said semiconductor layer, said p-type dopants having a first diffusion rate;
• implanting n-type dopants into said exposed region of said semiconductor layer, said n-type dopants having a second diffusion rate, said second diffusion rate different than said first diffusion rate;
• and
• heating said exposed region such that a first doped region is formed within a second doped region wherein said first doped region is doped with dopants of a first conductivity type and said second doped region is doped with dopants of a second conductivity type, said first conductivity type being different than said second conductivity type;
• wherein said circuit device comprises a bipolar transistor, said bipolar transistor comprising said first and second doped regions.

A method of forming a circuit device in a semiconductor layer comprising the steps of:

• exposing a region of said semiconductor layer;
• implanting p-type dopants into said exposed region of said semiconductor layer, said p-type dopants having a first diffusion rate;
• implanting n-type dopants into said exposed region of said semiconductor layer, said n-type dopants having a second diffusion rate, said second diffusion rate different than said first diffusion rate;
• and
• heating said exposed region such that a first doped region is formed within a second doped region wherein said first doped region is doped with dopants of a first conductivity type and said second doped region is doped with dopants of a second conductivity type, said first conductivity type being different than said second conductivity type;
• wherein said circuit device comprises a Zener diode which includes an anode and a cathode, said Zener diode comprising said first and second doped regions.