Digital phase shifting apparatus

A digital phase shifting apparatus comprising:

• sampling signal generating means for generating sampling signals at selected time intervals;
• means for sampling analog input signals at sampling time intervals provided by said sampling signal generating means and for generating a time-axis train of sampled data therefrom;
• memory means for storing the time-axis train of sampled data one after another sampled at fixed sampling intervals at addresses corresponding to sampling times;
• read means for reading out data sampled at times ahead of a current sampling time by desired time differences from said memory means one after another in synchronization with sampling which provides said time-axis train of sampled data;
• a plurality of register means for holding sampled data read out from said memory means, said sampled data being selected from a most recently read out data to a data ahead of the most recently read out data by a predetermined data count;
• and
• interpolated data generating means for summing up a plurality of sampled data held in said plurality of register means with a weighted coefficient applied to each sampled data to generate interpolated data at a desired arbitrary point in time within sampling intervals of the sampled data held in said plurality of register means, wherein said interpolated data generating means comprises
• a plurality of coefficient register means corresponding to said plurality of register means and for holding a predetermined weighted coefficient,
• a plurality of multiplier means corresponding to said plurality of register means and to said plurality of coefficient register means, and for multiplying a sampled data from the corresponding register means with a weighted coefficient from the corresponding coefficient register means, and
• an adder means for summing up outputs from said plurality of multiplier means.