Non-volatile semiconductor memory device having disturb verify function

An electrically writable and erasable nonvolatile semiconductor memory device comprising:

• a plurality of electrically writable and erasable nonvolatile semiconductor memory cells arranged in rows and columns;
• a decoder circuit for making at least one of said memory cells in a selected state and the other ones in a non-selected state;
• writing means for writing said memory cell in the selected state through said decoder circuit;
• erasing means for erasing said memory cell in the selected state through said decoder circuit;
• reading means for reading said memory cell in the selected state through said decoder circuit;
• detecting means for detecting a change of a threshold voltage of each of said non-selected memory cells, which change is caused by a voltage applied to the non-selected memory cell when writing or erasing said selected memory cell;
• and
• restoring means for restoring the threshold voltage of the non-selected memory cell to a value equal to or near to its original value before its change on the basis of a result of detecting the change of the threshold voltage of the non-selected memory cell, wherein said detecting means provides a number of detection levels for detecting the threshold voltage of the non-selected memory cell more than a minimum number of the detection levels necessary for reading information stored in the memory cell and compares the detection levels with the threshold voltage of each memory cell thereby to derive information on the change of the threshold voltage in addition to information stored in the memory cell.

An electrically writable and erasable nonvolatile semiconductor memory device comprising:

• a plurality of electrically writable nonvolatile semiconductor memory cells arranged in rows and columns;
• a decoder circuit for making at least one of said memory cells in a selected state and the other ones in a non-selected state;
• writing means for writing said memory cell in the selected state through said decoder circuit;
• erasing means for erasing said memory cell in the selected state through said decoder circuit;
• reading means for reading said memory cell in the selected state through said decoder circuit;
• first detecting means for detecting a change of a threshold voltage of each of the non-selected memory cells, which change is caused by a voltage applied to the non-selected memory cell when writing said selected memory cell;
• second detecting means for detecting a change of the threshold voltage of each of the non-selected memory cells, which change is caused by a voltage applied to the non-selected memory cell when erasing said selected memory cell;
• and
• restoring means for restoring the threshold voltage of the non-selected memory cell to a value equal to or near to its original value before its change on the basis of a result of detecting the change of the threshold voltage of the non-selected memory cell by said first or second detecting means, wherein each of said first and second detecting means provides a number of detection levels for detecting the threshold voltage of the selected memory cell more than a minimum number of the detection levels necessary for reading information stored in said selected memory cell and compares said detection levels with the threshold voltage of the selected memory cell thereby to obtain information for detecting the change of the threshold voltage in addition to information stored in the memory cell.

An electrically writable nonvolatile semiconductor memory device comprising:

• a plurality of electrically writable nonvolatile semiconductor memory cells arranged in rows and columns:
• a decoder circuit for making at least one of said memory cells in a selected state and the other ones in a non-selected state;
• writing means for writing said memory cell in the selected state through said decoder;
• reading means for reading said memory cell in the selected state through said decoder circuit;
• detecting means for detecting a change of a threshold voltage of each of the non-selected memory cells, which change is caused by a voltage applied to the non-selected memory cell when writing said selected memory cell;
• restoring means for restoring the threshold voltage of the non-selected memory cell to a value equal to or near to its original value before its change on the basis of a result of detecting the change of the threshold voltage of the non-selected memory cell;
• and
• counting means provided for each block including one or a plurality of the memory cells for counting a number of times of selection by which the block is selected for writing, wherein only when the number of times of selection exceeds a predetermined value, said change of the threshold voltage of the memory cell in said block is detected and the threshold voltage is restored.

An electrically writable and erasable nonvolatile semiconductor memory device comprising:

• a plurality of electrically writable and erasable nonvolatile semiconductor memory cells arranged in rows and columns;
• a decoder circuit for making at least one of said memory cells in a selected state and the other ones in a non-selected state;
• writing means for writing said memory cell in the selected state through said decoder circuit;
• erasing means for erasing said memory cell in the selected state through said decoder circuit;
• reading means for reading said memory cell in the selected state through said decoder circuit;
• detecting means for detecting a change of a threshold voltage of each of the non-selected memory cells, which change is caused by a voltage applied to the non-selected memory cell when erasing said selected memory cell;
• restoring means for restoring the threshold voltage of the non-selected memory cell to a value equal to or near to its original value before its change on the basis of a result of detecting the threshold voltage of the non-selected memory cell;
• and
• counting means provided for each block including one or a plurality of said memory cells for counting a number of times of selection by which the block is selected for writing or erasing, wherein only when said number of times of selection exceeds a predetermined value, the change of the threshold voltage of the memory cell in said block is detected and the threshold voltage is restored.

An electrically writable and erasable nonvolatile semiconductor memory device comprising:

• a plurality of electrically writable nonvolatile semiconductor memory cells arranged in rows and columns;
• a decoder circuit for making at least one of said memory cells in a selected state and the other ones in a non-selected state;
• writing means for writing said memory cell in the selected state through said decoder circuit;
• erasing means for erasing said memory cell in the selected state through said decoder circuit;
• reading means for reading said memory cell in the selected state through said decoder circuit;
• first detecting means for detecting a change of the threshold voltage of the non-selected memory cell, which change is caused by a voltage applied to the non-selected memory cell when writing said selected memory cell;
• second detecting means for detecting the change of the threshold voltage of said non-selected memory cell which change is caused by a voltage applied to said non-selected memory cell, when erasing said selected memory cell;
• restoring means for restoring the threshold voltage of the non-selected memory cell to a value equal to or near to its original value before its change on the basis of a result of detecting the change of the threshold voltage of the non-selected memory cell;
• and
• counting means provided for each block including one or a plurality of said memory cells for counting a number of times of selection by which the block is selected for writing or erasing, wherein only when the number of times of selection exceeds a predetermined value, the change of the threshold voltage of the memory cell in said block is detected and the threshold voltage is restored.