Delay interpolation circuitry
AssigneeIntel Corporation
InventorRoni Ashuri
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorRoni Ashuri
Estimating the term…
An integrated circuit for deskewing and adjusting a delay of a synthesized waveform. The synthesized waveform is initially produced by a digital-to-time domain converter which is coupled to a synchronous delay line and a pattern ROM through a shifter and a pattern register. The synchronous delay line generates a plurality of taps in response to a reference signal. Each one of the taps has a unit delay and is coupled to the digital-to-time domain converter. The integrated circuit which deskews and adjusts the delay of the synthesized waveform comprises a microdelay calibration circuit, a deskew control circuit, and a delay interpolation circuit. The microdelay calibration circuit is coupled to the taps of the synchronous delay line and the deskew control circuit. The deskew control circuit is coupled the shifter to perform coarse deskew operations. The deskew control circuit is further coupled to the delay interpolation circuit to perform fine deskew operations. The output of the digital to time domain converter is coupled to the delay interpolation circuit which then outputs a deskewed synthesized waveform. Deskew resolution of 0.05 ns is achieved with the integrated circuit described herein.
An integrated circuit for deskewing a synthesized waveform, the synthesized waveform being generated by a first digital-to-time domain converter in response to a pattern received from a shifter, the first digital-to-time domain converter being coupled to a synchronous delay line, the synchronous delay line generating a plurality of taps in response to a reference signal, each one of the plurality of taps coupled to the first digital-to-time domain converter, each one of the plurality of taps having a unit delay, the integrated circuit comprising:
Dependencies are inferred from the claim text.