Semiconductor device having an universal die size inner lead layout

A method of forming a semiconductor device assembly comprising:

• providing a substrate layer having a top surface and a bottom surface;
• providing upper conductive lead traces on the top surface of the substrate layer;
• arranging the upper conductive lead traces in a pattern directed to a central point on the substrate layer;
• extending the upper conductive lead traces towards, but not reaching, the central point, the upper conductive lead traces stopping short thereof and forming a generally square opening;
• providing lower conductive lead traces of the bottom surface of the substrate layer;
• providing a solder bump electrical termination on each lower conductive lead trace and electrically conductive thereto;
• providing conductive vias through the substrate layer such that they form electrical connections between the upper conductive lead traces and the lower conductive lead traces;
• mounting a semiconductor die atop the opening;
• and
• providing bond wires connecting the semiconductor die to the upper conductive lead traces;
• wherein the semiconductor die has a side dimension in a range of from smaller than the opening, to approximately equal to that of the opening, to substantially greater than the opening.