Bias circuit for controlling bias voltage of differential amplifier

A bias circuit for controlling a potential at bases of first and second transistors constituting a first differential amplifier, comprising:

• third and fourth transistors constituting a second differential amplifier and each having a current path one end of which is grounded via a resistor, said third transistor having a base connected to the base of said first transistor, and said fourth transistor having a base connected to the base of said second transistor;
• a constant-current source connected between a power source and another end of the current path of each of said third and fourth transistors, said constant-current source supplying a constant current to said third and fourth transistors;
• and
• a capacitor one end of which is connected to a connection node between said constant-current source and said another end of the current path of each of said third and fourth transistors, and another end of which is grounded, said capacitor being discharged when a high-level signal is input to the bases of said first and third transistors, thereby to drop a base potential of said first and second transistors.

A bias circuit of a mixer circuit, comprising:

• first and second transistors constituting a first differential amplifier and each having a current path one end of which is grounded via a resistor, said first transistor having a base supplied with an input signal;
• third and fourth transistors constituting a second differential amplifier and each having a current path one end of which is connected to another end of the current path of said first transistor and another end of which is connected to a power source, said third and fourth transistors each having a base supplied with a local oscillation signal;
• fifth and sixth transistors constituting a third differential amplifier and each having a current path one end of which is connected to another end of the current path of said second transistor and another end of which is connected to the power source, said fifth and sixth transistors each having a base supplied with a local oscillation signal;
• seventh and eighth transistors constituting a fourth differential amplifier and each having a current path one end of which is grounded via a resistor, said seventh transistor having a base connected to the base of said first transistor, and said eighth transistor having a base connected to a base of said second transistor;
• a constant-current source connected between the power source and another end of the current path of each of said seventh and eighth transistors, said constant-current source supplying a constant current to said seventh and eighth transistors;
• and
• a capacitor one end of which is connected to a connection node between said constant-current source and said another end of the current path of each of said seventh and eighth transistors, and another end of which is grounded, said capacitor being discharged when a high-level signal is input to the base of said first transistor, thereby to drop a base potential of said first and second transistors.

A bias circuit of a mixer circuit which includes first and second transistors constituting a first differential amplifier and each having a base supplied with an input signal, third and fourth transistors constituting a second differential amplifier and each having a base supplied with a local oscillation signal, and fifth and sixth transistors constituting a third differential amplifier and each having a base supplied with a local oscillation signal, and which mixes an output signal of the first differential amplifier and output signals of the second and third differential amplifiers, comprising:

• seventh and eighth transistors constituting a fourth differential amplifier and each having a current path one end of which is grounded via a resistor, said seventh transistor having a base connected to the base of said first transistor, and said eighth transistor having a base connected to the base of said second transistor;
• a constant-current source connected between a power source and another end of the current path of each of said seventh and eighth transistors, said constant-current source supplying a constant current to said seventh and eighth transistors;
• and
• a capacitor one end of which is connected to a connection node between said constant-current source and said another end of the current path of each of said seventh and eighth transistors, and another end of which is grounded, said capacitor being discharged when a high-level signal is input to the base of said first transistor, thereby to drop a base potential of said first and second transistors.

A bias circuit for controlling a potential at bases of first and second transistors constituting a first differential amplifier, comprising:

• third and fourth transistors constituting a second differential amplifier and each having a current path one end of which is grounded via a resistor, said third transistor having a base connected to the base of said first transistor and said fourth transistor having a base connected to the base of said second transistor;
• first and second constant-current sources each connected between a power source and another end of the current path of each of said third and fourth transistors, said first and second constant-current sources supplying a constant current to said third and fourth transistors;
• a first capacitor one end of which is connected to a connection node between said first constant-current source and said another end of the current path of said third transistor, and another end of which is grounded;
• and
• a second capacitor one end of which is connected to a connection node between said second constant-current source and said another end of the current path of said fourth transistor, and another end of which is grounded,
• said first and second capacitors being discharged when a high-level signal is input to the base of said first transistor, thereby to drop a base potential of said first and second transistors.

A bias circuit comprising:

• first and second transistors constituting a first differential amplifier and each having a current path one end of which is grounded and another end of which is connected to a power source, said first transistor having a base supplied with an input signal;
• third and fourth transistors constituting a second differential amplifier and each having a current path one end of which is grounded and another end of which is connected to the power source, said third transistor having a base connected to a base of said second transistor, and said fourth transistor having a base supplied with an input signal;
• fifth and sixth transistors constituting a third differential amplifier and each having a current path one end of which is grounded via a resistor, said fifth transistor having a base connected to the base of said first transistor, and said sixth transistor having a base connected to the base of said second transistor;
• seventh and eighth transistors constituting a fourth differential amplifier and each having a current path one end of which is grounded via a resistor, said seventh transistor having a base connected to the base of said second transistor, and said eighth transistor having a base connected to the base of said first transistor;
• a constant-current source connected between said power source and another end of the current path of each of said fifth, sixth, seventh and eighth transistors, said constant-current source supplying a constant current to said fifth, sixth, seventh and eighth transistors;
• and
• a capacitor one end of which is connected to a connection node between said constant-current source and said another end of the current path of each of said fifth, sixth, seventh and eighth transistors, and another end of which is grounded, said capacitor being discharged when a high-level signal is input to the bases of said first and fourth transistors, thereby to drop a base potential of said first and fourth transistors.