Exception handling method and apparatus for a microkernel data processing system

In a data processing system including a memory, a first processor that has a first plurality of fixed point registers and a first plurality of floating point registers, a second processor that has a second plurality of fixed point registers and a second plurality of floating point registers, a method for managing a process thread that is to be executed by the processors, comprising:

• creating the process thread in the memory to be executed by the first processor, and a process control block in the memory to store thread information;
• storing in the process control block a non-floating point indication that the process thread is not enabled to perform floating point operations;
• executing during a first occurring session, only fixed point operations with the process thread in the first processor using the first plurality of fixed point registers;
• removing the thread from the first processor at a termination of the first session and storing first values of the first plurality of fixed point registers in the process control block and, in response to said non-floating point indication, not storing the contents of the first plurality of floating point registers in the process control block;
• restoring the execution of the process thread in the second processor in a second occurring session by detecting said non-floating point indication in the process control block, and in response thereto, performing a lazy context restore operation by loading said first values from the process control block into the second plurality of fixed point registers and not loading the second plurality of floating point registers of the second processor;
• executing during said second occurring session, fixed point operations with the process thread in the second processor using the second plurality of fixed point registers;
• attempting to execute a floating point instruction in the process thread during said second session, and in response thereto, calling an exception handler;
• using said exception handler to store an alternate floating point indication in the process control block, to indicate that the process thread is enabled to perform floating point operations;
• resuming execution of said floating point instruction in the process thread in the second processor;
• removing the process thread from the second processor at a termination of said second session and storing second values of the second plurality of floating point registers in the process control block in response to said alternate floating point indication;
• and
• restoring the execution of the process thread in the second processor in a third occurring session by detecting said alternate floating point indication in the process control block, and in response thereto, performing a lazy context restore operation by loading said second values from the process control block into the second plurality of floating point registers of the second processor.

In a data processing system an apparatus for managing process threads that are to be executed by a processor, comprising:

• a memory in the data processing system;
• a bus means coupled to the memory;
• a processor coupled to the memory over the bus means, that has a plurality of fixed point registers and a plurality of floating point registers;
• a process thread in the memory to be executed by the processor, and a process control block in the memory to store thread information;
• said process control block storing a non-floating point indication that the process thread is not enabled to perform floating point operations;
• said processor executing during a first occurring session, only fixed point operations with the process thread in the processor using the plurality of fixed point registers;
• said processor removing the process thread from execution therein at a termination of the first session and storing first values of the fixed point registers in the process control block and, in response to said non-floating point indication, not storing the contents of the plurality of floating point registers in the process control block;
• said processor restoring the execution of the process thread therein in a second occurring session by detecting said non-floating point indication, and in response thereto, performing a lazy context restore operation by loading said first values from the process control block into the plurality of fixed point registers and not loading the plurality of floating point registers of the processor;
• said processor executing during said second occurring session, fixed point operations with the process thread in the processor using the plurality of fixed point registers;
• an exception handler in said memory;
• said processor attempting to execute a floating point instruction in the process thread during said second session, and in response thereto, calling said exception handler;
• said exception handler storing an alternate floating point indication in the process control block, to indicate that the process thread is enabled to perform floating point operations;
• said processor resuming execution of said floating point instruction in the process thread;
• said processor removing the process thread therefrom at a termination of said second session and storing second values of the plurality of floating point registers in the process control block in response to said alternate indication;
• and
• said processor restoring the execution of the process thread therein in a third occurring session by detecting said alternate floating point indication in the process control block, and in response thereto, performing a lazy context restore operation by loading said second values from the process control block into the plurality of floating point registers of the processor.

In a data processing system, an apparatus for managing a process thread that is to be executed by processors, comprising:

• a memory in the data processing system;
• a bus means coupled to said memory;
• a first processor coupled to said bus means, that has a first plurality of fixed point registers and a first plurality of floating point registers,
• a second processor coupled to said bus means, that has a second plurality of fixed point registers and a second plurality of floating point registers,
• a process thread in the memory to be executed by the first processor, and a process control block in the memory to store thread information;
• said process control block storing a non-floating point indication that the process thread is not enabled to perform floating point operations;
• said first processor executing during a first occurring session, only fixed point operations with the process thread in the first processor using the first plurality of fixed point registers;
• said first processor removing the process thread therefrom at a termination of the first session and storing first values of the first plurality of fixed point registers in the process control block and, in response to said non-floating point indication, not storing the contents of the first plurality of floating point registers in the process control block;
• said second processor restoring the execution of the process thread therein in a second occurring session by detecting said non-floating point indication in the process control block, and in response thereto, performing a lazy context restore operation by loading said first values from the process control block into the second plurality of fixed point registers and not loading the second plurality of floating point registers of the second processor;
• said second processor executing during said second occurring session, fixed point operations with the process thread therein using the second plurality of fixed point registers;
• said second processor attempting to execute a floating point instruction in the process thread during said second session, and in response thereto, calling an exception handler;
• said exception handler storing an alternate floating point indication in the second processor, to indicate that the process thread is enabled to perform floating point operation;
• said second processor resuming execution of said floating point instruction in the process thread therein;
• said second processor removing the process thread therefrom at a termination of said second session and storing second values of the second plurality of floating point registers in the process control block in response to said alternate floating point indication;
• and
• said second processor restoring the execution of the process thread therein in a third occurring session by detecting said alternate floating point indication in the process control block, and in response thereto, performing a lazy context restore operation by loading said second values from the process control block into the second plurality of floating point registers of the second processor.

In a data processing system including a memory and a processor that has a plurality of fixed point registers and a plurality of floating point registers, a method for managing process threads that are to be executed by the processor, comprising:

• creating an ID data structure in the memory to store the identity of a sole floating point thread executing in the processor;
• creating a process thread in the memory to be executed by the processor, and a process control block in the memory to store thread information;
• storing in the process control block a non-floating point indication that the process thread is not enabled to perform floating point operations;
• executing during a first occurring session, only fixed point operations with the process thread in the processor using the plurality of fixed point registers;
• removing the process thread from the processor at a termination of the first session and storing first values of the fixed point registers in the process control block and, in response to said non-floating point indication, not storing the contents of the plurality of floating point registers in the process control block;
• restoring the execution of the process thread in the processor in a second occurring session by detecting said non-floating point indication in the process control block, and in response thereto, loading said first values from the process control block into the plurality of fixed point registers and not loading the plurality of floating point registers of the processor;
• executing during said second occurring session, fixed point operations with the process thread in the processor using the plurality of fixed point registers;
• attempting to execute a floating point instruction in the process thread during said second session, and in response thereto, calling an exception handler;
• using said exception handler to store an alternate floating point indication in the process control block, to indicate that the process thread is enabled to perform floating point operations;
• identifying said thread as a sole floating point thread in said ID data structure;
• resuming execution of said floating point instruction in the thread;
• removing the process thread from the processor at a termination of said second session and storing second values of the plurality of fixed point registers and omitting storing the plurality of floating point registers in the process control block in response to said identification of the process thread as a sole floating point thread in said ID data structure.