US 5,479,629 AGranted

Method and apparatus for translation request buffer and requestor table for minimizing the number of accesses to the same address

AssigneeInternational Business Machines Corporation

InventorsHarry F. Angjelo, John R. Hatersley

Life of this patent

Estimating the term…

Loading patent…

Abstract

Duplicate translations resulting from multiple requests for address translations from a plurality of address generators are eliminated by the addition of a DLAT address buffer. If the address requested is a hit in the DLAT, the translation is handled in the conventional manner. If there is a miss, the address is put into the DLAT address buffer. Future requests from other address generators are compared with the addresses in the DLAT address buffer to see if there is an outstanding request for this address. If not, the addresses are also entered into the buffer. If there is an outstanding request, the requestor is marked in an address distributor as wanting the address. When the translation is returned from the BCE, the address is sent to all requestors wanting the address, to the DLAT and to the buffer for deletion from the buffer.

Claims10

Dependent claims

An address translation mechanism supporting a plurality of address generators in a data processing system comprising:

table means for storing address translation entries representing addresses to be translated, said table means, operatively coupled to said plurality of address generators, for supplying an address output when an address request from an address generator has a predetermined relationship with a translation entry;
means for detecting when an address request from an address generator does not have a predetermined relationship with a translation entry in said table means;
address buffer and compare means, operatively coupled to said detecting means, for determining whether there is an outstanding request for a translation of an address currently stored for translation and, if there is no such outstanding request, temporarily storing said address for translation;
distribution means, operatively coupled to said address buffer and compare means, for identifying all requestors of address translations for each address stored for translation;
and
translation means for translating addresses temporarily stored by said address buffer and compare means, said translation means supplying translated addresses to said distribution means for distribution to each of said address generators identified as requesting translated addresses and to said table means,
wherein said address buffer and compare means comprises second table means having a plurality of storage locations for storing addresses to be translated, each of said storage locations including an active bit position indicating whether an address is active for translation by said translation means,
said address buffer and compare means further comprising compare means for comparing addresses in said second table means with an address requested for translation by said detecting means and for entering an address not found in said second table means.

5 more elements

A method of address translation which supports a plurality of address generators in a data processing system, said method comprising the steps of:

storing, in a table, a plurality of address translation entries representing addresses to be translated and supplying an address output when an address request from an address generator has a predetermined relation with a translation entry of said plurality of translation entries;
detecting when an address request from an address generator does not have a predetermined relation with said translation entry of said plurality of translation entries in said table;
identifying all address generators requesting translations of said addresses for which there is not a corresponding translation entry among the stored plurality of address translation entries;
determining whether there is an outstanding request for a translation of an address temporarily stored for translation using a second table having storage locations with an active bit position indicating whether an address is active for translation and, if there is no such outstanding request, temporarily storing said address for translation in said table with said plurality of translation entries;
translating said plurality of translation entries;
and
distributing translated addresses to each of said address generators identified as requesting the respective translated addresses.

4 more elements

An address translation mechanism supporting a plurality of address generators in a data processing system comprising:

table means for storing address translation entries representing addresses to be translated, said table means, operatively coupled to said plurality of address generators, for supplying an address output when an address request from an address generator has a predetermined relationship with a translation entry;
means for detecting when an address request from an address generator does not have a predetermined relationship with a translation entry of said translation entries in said table means;
address buffer and compare means, operatively coupled to said detecting means, for determining whether there is an outstanding request for a translation of an address currently stored for translation and, if there is no such outstanding request, temporarily storing an address for translation with said translation entries;
distribution means, operatively coupled to said address buffer and compare means, for identifying all requestors of address translations for said addresses stored for translation among the stored plurality of address translation entries;
and
translation means for translating addresses temporarily stored by said address buffer and compare means, said translation means supplying translated addresses to said distribution means for distribution to each of said address generators identified as requesting translated addresses and to said table means,
means for inhibiting an address translation of addresses in said table means when said inhibiting means is set and for allowing an address translation of addresses in said table means when said inhibiting means is not set, such that addresses not requiring translation are not read out to said address buffer and compare means for translation,
a position register for holding a position of an address to be translated,
inverting means coupled to said position register for updating said position of said position register for an address to be translated;
wherein with an address read out of said table means in which said inhibiting means is set, said position of an address is incremented in said position register
wherein said address buffer and compare means comprises second table means having a plurality of storage locations for storing addresses to be translated, each of said storage locations including an active bit position indicating whether an address is active for translation by said translation means,
said address buffer and compare means further comprising compare means for comparing addresses in said second table means with an address requested for translation by said detecting means and for entering an address not found in said second table means.

9 more elements

Dependencies are inferred from the claim text.