Method and device for data recovery in burst mode communication system
AssigneeAlcatel
InventorsCharles Eldering, Fernando H. Martin
Life of this patent
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AssigneeAlcatel
InventorsCharles Eldering, Fernando H. Martin
Estimating the term…
A method for data recovery in burst mode communication systems that include a data signal having a burst preamble with a defined sequence of m bits, by sampling in a first sampling step (2) the burst preamble with n samples per bit carried out by n bit clocks with different phases, and providing a sampled burst preamble. The method is characterized in that it further comprises the steps of correlating in a correlation step (3) the sampled burst preamble with at least n representations of the defined sequence of m-bits of the burst preamble also sampled at n times per bit, each of said at least n representations being delayed one sample clock period with respect to a previous one of said at least n representations in order to obtain at least n time-shifted correlation results; determining in a decision step (4) an optimum phase clock and a first received data bit based on which of said at least n time-shifted correlation results has a greatest value; and regenerating in a regeneration step (5) a sampled data signal sampled at an optimum instant in accordance with the optimum phase clock.
A method for data recovery in burst mode communication systems that include a data signal having a burst preamble with a defined sequence of m bits, and including the steps of sampling in a first sampling step (2) the burst preamble with n samples per bit carried out by n bit clocks with different phases and providing a sampled burst preamble, characterized in that the method further comprises the additional steps of:
A device for data recovery in burst mode communication systems, that comprises a generator (11) of n bit clocks (21) with different phases, and a first digitizer (12) that receives an incoming data signal (22) that include a preamble with a defined m-bit sequence and that receives the n bit clocks (21) with different phases, and that provides a digitized preamble (23) with n samples per bit on a parallel bus of m times n samples, characterized in that the device further comprises:
Dependencies are inferred from the claim text.