Digital data concentrator

A concentrator comprising:

• first multiplexers wherein each first multiplexer has inputs connected to respective communication channels that carry inbound words of digital data and has an output channel for carrying an inbound word associated with one of the communication channels;
• random access memory organized as M columns and N rows capable of accepting and storing up to I of the inbound words during a single clock cycle in one of the M columns, where I is a positive integer greater than one and less than N, the memory having I data inputs;
• control buffer means, connected between each output channel and the I data inputs, for selecting one of (a) storing an associated inbound word, (b) transmitting the associated inbound word to the respective I data input, and (c) doing both (a) and (b) during each clock cycle, the first multiplexers and control buffer means being responsive to control signals wherein the inbound word coupled to the output of each of the first multiplexers and the one selected by the control buffer means for each clock cycle is determined by the control signals;
• the first multiplexers and control buffer means operating in response to the control signals and causing a first column in the random access memory to be completely filled with inbound words before another column in the random access memory can receive any inbound words.