US 5,479,364 A · Method and arrangement for transformation of signals from a frequency to a time domain

Abstract

An IDCT, or Inverse Discrete Cosine Transform, method decimates a 2-D IDCT into two 1-D IDCT operations and then operates separately on the even and odd pixel input words. In a common processing step, selected input values are passed directly to output adders and subtractors, while others are multiplied by constant, scaled cosine values. In a pre-common processing step, the lowest-order odd input word is pre-multiplied by .sqroot.2, and the odd input words are summed pairwise before processing in a common processing step. In a post-common processing step, intermediate values corresponding to the processed odd input words are multiplied by predetermined coefficients to form odd resultant values. After calculation of the even and odd resultant values, the high-order and low-order outputs are formed by simple subtraction/addition, respectively, of the odd resultant values from/with the even resultant values. The input values are preferably scaled upward by a factor of .sqroot.2. Selected bits of some intermediate resulting data words are optionally adjusted by forcing these bits to either "1" or "0". The IDCT system includes a pre-common processing circuit (PREC), a common processing circuit (CBLK), and a post-common processing circuit (POSTC), which perform the necessary operations in the respective steps. The system also includes a controller (CNTL) to generate signals to control the loading of system latches and, preferably, to time-multiplex the application of the even and odd input words to latches in the pre-common circuit.

Claims28

Dependent claims

A method for transforming digital signals from a frequency to a time representation, including grouping the digital signals into groups of N data input words;

CHARACTERIZED by the following steps:
a) in a pre-common processing means (PREC) performing predetermined pairing operations on odd-numbered ones of the input words and transmitting even-numbered ones of the input words to the pre-common outputs;
b) passing both odd- and even-numbered input data words in separate passes through a common processing means (CBLK) to form odd and even common processing means output values, respectively;
and
c) in a post-common processing means (POSTC), performing predetermined output scaling operations on the odd common means output values to form post-processed odd values and arithmetically combining the post-processed odd values with the even common means outputs to generate high- and low-order output words;
the method being such that the output words contain inverse discrete cosine transformation values corresponding to the input data words.

3 more elements

In combination for operating on indications representing a discrete cosine transform to obtain indications representing an inverse discrete cosine transform,

first means for providing the indications of the discrete cosine transform for a sequence of input words in a block, the input words constituting even words and odd words,
second means for processing the indications in the even words differently from the indications in the odd words to obtain first indications from the second means,
third means responsive to the first indications from the second means for providing the same processing for the output indications from the even words in the second means and the output indications for the odd words from the second means to provide second indications, and
fourth means responsive to the second indications from the third means for performing arithmetic and geometric operations on such second indications for related pairs of odd and even words to obtain output indications output related to the inverted discrete cosine transform.

1 more element

In combination for operating on indications representing a discrete cosine transform to obtain indications representing an inverse discrete cosine transform,

first means for providing the indications of the discrete cosine transform in a sequence of input words in a block, the words constituting even words and odd words,
second means for processing the indications of the discrete cosine transform in the even words and in the odd words to obtain first indications, the second means including first latching means for holding the first indications from the second means,
means for providing clock signals for controlling the passage of the first indications from the second means into and out of the first latching means for the second means,
third means for providing the same processing for the first indications from the even words in the second means and the first indications from the odd words in the second means to produce second indications from the third means, the third means being operative independently of any latching means, and
fourth means for processing the second indications and for producing third indications related to the inverse discrete cosine transform, the fourth means including second latching means responsive to the clock signals for controlling the times of operation of the fourth means in accordance with the occurrence of the clock signals.

2 more elements

In combination for operating on binary indications representing a discrete cosine transform to obtain binary indications representing an inverse discrete cosine transform where the binary indications representing the discrete cosine transform include a binary factor representing a constant value constituting the square root of two (.sqroot.2),

first means for providing the binary indications of the discrete cosine transform in a sequence of input words in a block, the input words constituting even words and odd words,
second means for processing the binary indications of the discrete cosine transform to obtain binary output indications related to the inverse discrete cosine transform and including the binary factor constituting the square root of two (.sqroot.2), and
means for shifting the binary output indications by one binary position to obtain a division of the binary output indications by a factor of two (2) and to obtain binary indications related to the inverse discrete cosine transform.

Dependencies are inferred from the claim text.

Method and arrangement for transformation of signals from a frequency to a time domain

Life of this patent

Method and arrangement for transformation of signals from a frequency to a time domain

Life of this patent

Abstract

Claims28