US 5,479,165 AGranted

Two-dimensional coding apparatus

AssigneeNEC Corporation

InventorAtsushi Nakayama

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Abstract

A two-dimensional coding apparatus for two-dimensionally coding binary image data prepared by way of a FIFO memory, which reduces a time for which a host computer participates to enhance the speed of decoding processing. A two-dimensional coding circuit outputs a signal representing whether data to be read out from a memory are reference line data or coding line data, and in response to the signal and a signal read out from the memory, a circuit consisting of an invertor and a pair of AND gates outputs a read-out signal for a reference line FIFO memory and another read-out signal for a coding line FIFO memory. Consequently, the host computer need not control the memory address outputted from the two-dimensional coding circuit to fetch binary image data from the image data FIFO memory, and the FIFO memories can be used without special hardware means for the memory address control.

Claims12

Dependent claims

A two-dimensional coding apparatus, comprising:

a reference line first in first out (FIFO) memory (1) and a coding line FIFO memory (2) for receiving and storing binary image data for a reference line and a coding line inputted thereto from the outside, respectively;
a multiplexer (3) for outputting the binary image data read out from the two FIFO memories (1 and 2) from a common output terminal thereof;
a two-dimensional coding circuit (5) for receiving the binary image data outputted from said multiplexer (3) and two-dimensionally coding the received data and for selectively outputting a memory read-out signal and a data requesting signal each having one of an active state and an inactive state;
and
selective reading means for receiving said memory read-out signal and said data requesting signal outputted from said two-dimensional coding circuit (5) and reading out the binary image data from one of said reference line. FIFO memory (1) and said coding line FIFO memory (2) when only the memory read-out signal is active but reading out the binary image data from the other of said reference line FIFO memory (1) and said coding line FIFO memory (2) when both of the memory read-out signal and the data requesting signal are active.

2 more elements

A two-dimensional coding apparatus, comprising:

a reference line first in first out (FIFO) memory (1) and a coding line FIFO memory (2) for receiving and storing binary image data for a reference line and a coding line inputted thereto from the outside, respectively;
a multiplexer (3) for outputting the binary image data read out from the two FIFO memories (1 and 2) from a common output terminal thereof;
a two-dimensional coding circuit (5) for receiving the binary image data outputted from said multiplexer (3) and two-dimensionally coding the received data and for selectively outputting a memory read-out out signal and a reference line data requesting signal each having one of an active state and an inactive state;
and
selective reading means for receiving said memory read-out signal and said reference line data requesting signal outputted from said two-dimensional coding circuit (5) and reading out the binary image data from said reference line FIFO memory (1) when both of the memory read-out signal and the reference line data requesting signal are active but reading out the binary image data from said coding line FIFO memory (2) when only the memory read-out signal is active.

2 more elements

A two-dimensional coding apparatus, comprising:

a reference line first in first out (FIFO) memory (1) and a coding line FIFO memory (2) for receiving and storing binary image data for a reference line and a coding line inputted thereto from the outside, respectively;
a multiplexer (3) for outputting the binary image data read out from the two FIFO memories (1 and 2) from a common output terminal thereof;
a two-dimensional coding circuit (5) for receiving the binary image data outputted from said multiplexer (3) and two-dimensionally coding the received data and for selectively outputting a memory read-out signal and a reference line data requesting signal each having one of an active state and an inactive state;
and
selective reading means for receiving said memory read-out signal and said reference line data requesting signal outputted from said two-dimensional coding circuit (5) and reading out the binary image data from said coding line FIFO memory (2) when both of the memory read-out signal and the reference line data requesting signal are active but reading out the binary image data from said reference line FIFO memory (1) when only the memory read-out signal is active.

2 more elements

Dependencies are inferred from the claim text.