Semiconductor chip contact bump structure

A semiconductor chip comprising:

• a substrate having a central area thereon provided with a circuitry pattern and a peripheral area surrounding said central area;
• a plurality of electrode pads formed on said peripheral area;
• a passivation layer covering said substrate and said plurality of electrode pads, said passivation layer having a plurality of contact windows, each contact window exposing a respective electrode pad and being defined by a pair of opposing first edges of said passivation layer and a pair of opposing second edges of said passivation layer;
• a plurality of contact bumps, each contact bump of said plurality of contact bumps being formed on a respective electrode pad exposed through a respective contact window, wherein said plurality of contact bumps are made from an electrically conductive material, each contact bump being wider than a corresponding contact window along a first direction parallel to said pair of opposing first edges so as to cover a portion of said passivation layer and being narrower than said corresponding window along a second direction parallel to said opposing second edges of said contact window, wherein each contact bump has an upper surface which is curved along said first direction and is substantially flat along said second direction.

A semiconductor chip contact bump structure comprising:

• a semiconductor substrate;
• an electrode pad formed on said semiconductor substrate;
• a passivation layer formed over said semiconductor substrate and said electrode pad formed on said semiconductor substrate, said passivation layer having a contact window formed therethrough to expose at least a portion of said electrode pad;
• and
• a contact bump made from an electrically conductive material formed on said electrode pad through said contact window, wherein an upper surface of said contact bump is curved in a concave manner along said first direction and is substantially flat along said second direction.

A semiconductor chip comprising:

• a substrate having a central area thereon provided with a circuitry pattern and a peripheral area surrounding said central area;
• an electrode pad formed on said peripheral area;
• a passivation layer covering said substrate and said electrode pad, said passivation layer having a contact window formed therethrough exposing said electrode pad;
• a contact bump formed on said electrode pad exposed through said contact window, wherein said contact bump has an upper surface which is curved along a first direction and is substantially flat along said second direction.