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US 5,478,771 AGranted
Method of forming local interconnect structure without P-N junction between active elements
AssigneeSGS-Thomson Microelectronics S.A.
InventorsTsiu C. Chan, Frank R. Bryant, John L. Walters
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Abstract
An interconnect structure, and method for forming same, is suitable for use in integrated circuits such as SRAM devices. The structure uses masking of a polycrystalline silicon interconnect level to move a P-N junction to a region within a polycrystalline silicon interconnect line, rather than at the substrate. This P-N junction can then be shorted out using a refractory metal silicide formed on the polycrystalline silicon interconnect structure.
Claims9
A method of forming an interconnect structure for an integrated circuit device, comprising the steps of:
- forming an N-channel transistor in a first portion of a substrate, the N-channel transistor having a gate electrode;
- forming a P-channel transistor in a second portion of the substrate, the P-channel transistor having a gate electrode, wherein both the P-channel transistor and N-channel transistor gate electrodes are doped to have an N-type conductivity;
- forming an insulating layer over the N-channel and P-channel transistors, including their gate electrodes;
- forming openings through the insulating layer to expose a portion of the N-channel transistor gate electrode and a portion of a source/drain region of the P-channel transistor;
- forming a layer of polycrystalline silicon over the insulating layer and in the openings;
- doping a first portion of the polycrystalline silicon layer, in contact with the N-channel transistor gate electrode, with an N-type dopant;
- doping a second portion of the polycrystalline silicon layer, in contact with the source/drain region of the P-channel transistor, with a P-type dopant, wherein the first and second portions of the polycrystalline silicon layer are adjacent, wherein a PN junction is formed between them;
- and
- forming a refractory metal silicide layer over the polycrystalline silicon to provide a conductive path between the first and second polycrystalline silicon portions which is in parallel with the PN junction.
6 more elements
Dependencies are inferred from the claim text.