Memory device
AssigneeYozan Inc.
InventorsGuoliang Shou, Sunao Takatori, Makoto Yamamoto
Life of this patent
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Abstract
The present invention has an object to provide a memory device without the necessity of refreshment, whose circuit is small size. A memory device structuring a memory cell by connecting the follows: i) the first transistor of PNP type, having connection of input voltage to its base and grounding an emitter; ii) the second transistor of NPN type having connection of base to a collector of the first transistor, grounding collector and connection of power source to an emitter; and iii) the collector of the second transistor to the base of the first transistor.
Claims3
A memory cell in a memory device including a power supply, said memory cell comprising:
- i) an input terminal;
- ii) a first NPN transistor having a base, a collector, and an emitter operatively connected to ground;
- iii) a second PNP transistor having a base operatively connected to said collector of said first transistor, a collector and an emitter, said emitter being operatively connected to said power supply,
- wherein said collector of said second transistor is operatively connected to said base of said first transistor
- iv) a switching arrangement for selectively operatively connecting said base of said first NPN transistor to one of an input voltage via said terminal and ground;
- and
- v) an output terminal provided at said collector of said second PNP transistor.
Dependencies are inferred from the claim text.