Operation device and operation method for discrete cosine transform and inverse discrete cosine transform

A method for high efficiency coding of image data implemented in an operation device for inverse discrete cosine transform to obtain N pieces of original image data from N pieces of discrete data in frequency space with arguments from 0 to (N-1) (N is a positive integer expressed by a positive power of 2), said method comprising the steps of:

• (a) receiving and storing said N pieces of discrete data in frequency space in a data memory;
• (b) executing a first product-sum operation with 2.sup.n pieces of discrete data among said N pieces whose arguments have a remainder of N/2.sup.n+1 after division by an argument N/2.sup.n (n is an arbitrary positive integer from 1 to (log.sub.2 N-1)) and 2.sup.n pieces of inverse discrete cosine transform coefficients (log.sub.2 N-1) times to obtain 2.sup.n pieces of first product-sum operation results with arguments from 0 to (2.sup.n -1) and storing said first product-sum operation results in said data memory;
• (c) executing a second product-sum operation with two pieces of discrete data among said N pieces whose arguments are 0 and N/2 and four inverse discrete cosine transform coefficients to obtain two pieces of second product-sum operation results with arguments from 0 to 1 and storing said second product-sum operation results in said data memory;
• (d) adding two data with the same arguments among two pairs of L pieces of data with arguments from 0 to (L-1) (log.sub.2 N-1) times and storing L pieces of addition results in said data memory;
• and
• (e) subtracting two data with the same arguments among two pairs of L pieces of data with arguments from 0 to (L-1) (log.sub.2 N-1) times and storing L pieces of subtraction results in said data memory.

An operation device for discrete cosine transform and inverse discrete cosine transform comprising:

• memory means for storing original image data, intermediate operation results, discrete cosine transform operation results, discrete cosine transform coefficients and inverse discrete cosine transform coefficients;
• address generator means for specifying read/write addresses for data in said memory means;
• adder means for performing addition or subtraction of the data read out of a plurality of addresses in said memory means as specified by said address generator means and writing the addition or subtraction operation results to the address in said memory means as specified by said address generator means;
• and
• product-sum operation means for performing product-sum operation of the data read out of a plurality of addresses in said memory means as specified by said address generator means and writing the product-sum operation results to the address in said memory means as specified by said address generator means.