Temperature compensated PLL frequency synthesizer and high-speed frequency lock method using the same

A PLL frequency synthesizer which includes a voltage controlled oscillator for oscillating and outputting an analog frequency control voltage such that a phase difference component with respect to a reference oscillation voltage is compensated to obtain a stable output frequency synchronized with an analog reference oscillation voltage oscillated and output from a reference oscillator, comprising an A-D converter for receiving the frequency control voltage in a stable frequency state, and for converting the frequency control voltage into a corresponding digital signal and outputting the digital signal, a storage unit for storing a signal value of the digital signal, a D-A converter for converting the signal value into a corresponding analog signal and for outputting the analog signal, a control unit for controlling input of the frequency control voltage to said A-D converter, reading of the signal value from said storage unit, and output of the analog signal from said D-A converter, a loop filter for applying an output voltage of the analog signal to said voltage-controlled oscillator by said control unit before said synthesizer is started, a temperature detecting means for detecting a temperature around said synthesizer, and temperature compensating means for outputting a temperature compensation signal for compensating a potential difference between terminals of said control unit in correspondence with a temperature difference between operative and inoperative states of said synthesizer, and wherein said control unit converts the analog signal into a temperature-compensated temperature compensation analog signal on the basis of the signal value and the compensation signal.

A high-speed frequency lock method comprising the steps of:

• reading, from a storage unit, an output signal from an A-D converter, and first temperature information immediately before a previous stop, and receiving second temperature information detected by a temperature detector to read a digital value of a voltage change amount corresponding to a temperature difference with respect to the first temperature information from a ROM, immediately before a PLL frequency synthesizer is started;
• converting a composite signal of the output signal read from said storage unit and the digital value read from said ROM into a temperature compensation signal as an output voltage corresponding to the composite signal by a D-A converter, and applying the output voltage to a capacitor of a loop filter;
• turning on a loop switch to cut off said loop filter from a charge pump, and commanding said PLL frequency synthesizer to perform a high-speed frequency lock operation;
• detecting an output signal from said A-D converter in a frequency stable state, and receiving new temperature information from said temperature detector and storing the output signal and the information in said storage unit, immediately before an operation of said PLL frequency synthesizer is stopped;
• and
• turning off said loop switch, and stopping said PLL frequency synthesizer.