Logic circuit with negative differential resistance device
AssigneeMotorola, Inc.
InventorsJun Shen, Herbert Goronkin, Saied N. Tehrani
Life of this patent
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Abstract
A logic circuit including a pair of FETs connected in parallel and including first and second common current terminals, each of the FETs further having a control terminal connected to receive a logic signal thereon. A negative differential resistance device affixed to one of the first and second common current terminals and having a conductance characteristic such that the device operates at a peak current when one of the FETs is turned ON and at a valley current when both of the FETs are simultaneously turned ON. A load resistance coupled to the other of the first and second common current terminals and providing an output for the logic circuit.
Claims18
A logic circuit comprising:
- a pair of field effect transistors connected in parallel and including first and second common current terminals, each of the pair of field effect transistors further having a control terminal connected to receive a logic signal thereon;
- a negative differential resistance device operably affixed to one of the first and second common current terminals of the pair of field effect transistors and having a conductance characteristic such that the negative differential resistance device operates approximately at a peak current when one of the pair of field effect transistors is turned ON and approximately at a valley current when both of the pair of field effect transistors are simultaneously turned ON;
- and
- a load resistance coupled to the other of the first and second common current terminals and providing an output for the logic circuit.
A logic circuit comprising:
- a substrate;
- a pair of heterostructure field effect transistors formed on the substrate and connected in parallel and including first and second common current terminals constructed to be coupled to a supply potential and a reference potential, respectively, each of the pair of field effect transistors further having a control terminal connected to receive a logic signal thereon;
- a negative differential resistance device formed on the substrate and operably coupling one of the supply potential to the first common current terminal and the reference potential to the second common current terminal, the negative differential resistance device having a conductance characteristic such that the negative differential resistance device operates approximately at a peak current when one of the pair of field effect transistors is turned ON and approximately at a valley current when both of the pair of field effect transistors are simultaneously turned ON;
- and
- a load resistance coupling the other of the supply potential to the first common current terminal and the reference potential to the second common current terminal.
Dependencies are inferred from the claim text.