Power source noise suppressing type semiconductor device

A power source noise suppressing semiconductor device comprising:

• a semiconductor chip having a surface, said semiconductor chip having a plurality of pads on the surface thereof, said pads including at least a first circuit pad and a second circuit pad, a first power source applied to said first circuit pad, a second power source applied to said second circuit pad, a voltage value of the second power source being independent of changes in a voltage value of the first power source;
• a plurality of leads, including at least one power source lead, each of said plurality of leads having an inner lead and an outer lead;
• and
• a plurality of electrically connecting means for electrically connecting one of said first circuit pad and said second circuit pad to an inner lead of one of said plurality of leads,
• said first circuit pad being connected to a first connection point of an inner lead of said power source lead by one of said electrically connecting means,
• said second circuit pad being connected to a second connection point of said inner lead of said power source lead by another of said electrically connecting means,
• said first and second connection points being spaced apart by a distance which allows a mutual inductance between said first and second connection points of said inner lead of said power source lead to become smaller than a self-inductance of an outer lead of said power source lead,
• wherein said first and second circuit pads are both disposed on the surface of said chip along one side of said chip, and said inner lead of said power source lead is disposed along said one side, and
• wherein said outer lead of said power source lead is disposed in a first direction which is substantially perpendicular to a second direction along said one side, said inner lead is bent at an angle of 90 degrees relative to said outer lead, and said inner lead is disposed between said one side of said chip and said inner lead of another of said plurality of leads.

A power source noise suppressing type semiconductor device comprising:

• a semiconductor chip having a surface, said semiconductor chip having a plurality of pads on the surface thereof, said pads including at least a first high voltage pad and a first low voltage pad, and a second high voltage pad and a second low voltage pad, a first power source applied to said first high voltage pad and said first low voltage pad, a second power source applied to said second high voltage pad and said second low voltage pad, a voltage value of said second power source being independent of changes in a voltage value of said first power source:
• a plurality of leads including at least a high voltage power source lead and a low voltage power source lead, each of said plurality of leads having an inner lead and an outer lead;
• and
• a plurality of electrically connecting means for electrically connecting one of said first high voltage pad, said first low voltage pad, said second high voltage pad and said second low voltage pad to an inner lead of one of said plurality of leads,
• said first and second high voltage and low voltage pads being connected respectively to first and second connection points of an inner lead of said high voltage power source lead by respective ones of said electrically connecting means,
• said high voltage first and second connection points being spaced apart by a distance which allows a mutual inductance between said high voltage first and second connection points of said inner lead of said high voltage power source lead to become smaller than a self-inductance of an outer lead of said high voltage power source lead,
• said low voltage first and second connection points being spaced apart by a distance which allows a mutual inductance between said low voltage first and second connection points of an inner lead of said low voltage power source lead to become smaller than a self-inductance of an outer lead of said low voltage power source lead,
• wherein said distance for each of said power source leads is set such that said mutual inductance becomes 1/10, or less than, said self-inductance, and
• wherein said semiconductor chip has four sides, said first high voltage pad and said second high voltage pad are respectively disposed on the surface of said chip at a first and a second predetermined location adjacent to two opposite sides of the four sides of said chip, and said first low voltage pad and said second low voltage pad are respectively disposed on the surface of said chip at a third and a fourth predetermined location adjacent to two opposite sides of the four sides of said chip.

A power source noise suppressing semiconductor device connected to a first and a second power source that respectively supply a first and a second voltage value to said semiconductor device, comprising:

• a semiconductor chip having a plurality of pads on a surface thereof, said pads including at least a first circuit pad and a second circuit pad, said first power source being applied to said first circuit pad, said second power source being applied to said second circuit pad, said second voltage value of said second power source being independent of changes in said first voltage value of said first power source;
• a plurality of leads, including at least one power source lead, each of said plurality of leads having an inner lead and an outer lead;
• and
• a plurality of connecting means for electrically connecting one of said first circuit pad and said second circuit pad to an inner lead of one of said plurality of leads,
• said first circuit pad being connected to a first connection point of an inner lead of said power source lead by one of said connecting means,
• said second circuit pad being connected to a second connection point of said inner lead of said power source lead by another of said connecting means, and
• said first and second connection points being spaced apart by a distance which allows a mutual inductance between said first and second connection points of said inner lead of said power source lead to become smaller than a self-inductance of an outer lead of said power source lead,
• wherein said distance is set to a value which is greater than a pitch value of said plurality of leads.

A power source noise suppressing type semiconductor device connected to a first and a second power source that respectively supply a first and a second voltage value to said semiconductor device, comprising:

• a semiconductor chip, said semiconductor chip having a plurality of pads on a surface thereof, said pads including at least a first high voltage pad and a first low voltage pad, and a second high voltage pad and a second low voltage pad, said first power source being applied to said first and second high voltage pads, said second power source being applied to said first and second low voltage pad, said second voltage value of said second power source being independent of changes in said first voltage value of said first power source;
• a plurality of leads including at least a high voltage power source lead and a low voltage power source lead, each of said plurality of leads having an inner lead and an outer lead;
• and
• a plurality of connecting means for electrically connecting one of said pads to one of said inner leads of one of said leads,
• said first and second high voltage and low voltage pads being connected respectively to first and second connection points of said inner lead of said high voltage power source lead by respective ones of said connecting means,
• said high voltage first and second connection points being spaced apart by a distance which allows a mutual inductance between said high voltage first and second connection points of said inner lead of said high voltage power source lead to become smaller than a self-inductance of said outer lead of said high voltage power source lead, and
• said low voltage first and second connection points being spaced apart by a distance which allows a mutual inductance between said low voltage first and second connection points of said inner lead of said low voltage power source lead to become smaller than a self-inductance of said outer lead of said low voltage power source lead,
• said distance is set to a value which is greater than a pitch value of said leads.

A power source noise suppressing type semiconductor device connected to a first and a second power source that respectively supply a first and a second voltage value to said semiconductor device, comprising:

• a semiconductor chip, said semiconductor chip having a plurality of pads on a surface thereof, said pads including at least a first high voltage pad and a first low voltage pad, and a second high voltage pad and a second low voltage pad, said first power source being applied to said first and second high voltage pad, said second power source being applied to said first and second low voltage pad, said second voltage value of said second power source being independent of changes in said first voltage value of said first power source;
• a plurality of leads including at least a high voltage power source lead and a low voltage power source lead, each of said plurality of leads having an inner lead and an outer lead;
• and
• a plurality of connecting means for electrically connecting one of said pads to one of said inner leads of one of said leads,
• said first high voltage and low voltage pads being connected respectively to high voltage and low voltage first connection points of said inner leads of said high voltage and low voltage power source leads by respective ones of said connecting means,
• said second high voltage and low voltage pads being connected respectively to high voltage and low voltage second connection points of said inner leads of said low voltage and high voltage power source leads by respective ones of said connecting means,
• said high voltage first and second connection points being spaced apart by a distance which allows a mutual inductance between said high voltage first and second connection points of said inner lead of said high voltage power source lead to become smaller than a self-inductance of said outer lead of said high voltage power source lead, and
• said low voltage first and second connection points being spaced apart by a distance which allows the mutual inductance between said low voltage first and second connection points of said inner lead of said low voltage power source lead to become smaller than a self-inductance of said outer lead of said low voltage power source lead,
• said distance is set to a value which is greater than a pitch value of said plurality of leads.