US 5,476,807 A · Method for forming fine patterns in a semiconductor device

Abstract

A method for forming a fine pattern, e.g., for forming the storage electrodes of the capacitors of the memory cells of semiconductor memory devices, which includes the steps of depositing a mask layer on the layer to be patterned, depositing a photoresist layer on the mask layer, patterning the photoresist layer, to thereby form a photoresist pattern, anisotropically etching the mask layer, using the photoresist pattern as an etching mask, to thereby form a mask layer pattern, wherein etch by-products are formed on sidewalls of a composite layer comprised of the photoresist pattern and the mask layer pattern, and, etching the layer to be patterned using the composite layer and the etch by-products as an etching mask, to thereby form a fine pattern. The mask layer is made of a material, e.g., a high-temperature oxide, having different physical properties than that of the photoresist. Further, the anisotropic etching process is preferably carried out by means of a plasma etching process using a mixture of CF.sub.4, CHF.sub.4, and Ar gases, with the amount of the etch by-products being controllably adjusted by the ratio of these gases, and/or by controllably adjusting the time, temperature, and/or pressure parameters of this anisotropic etching process.

Claims7

Dependent claims

A method for manufacturing a semiconductor memory device, comprising the steps of:

providing a semiconductor substrate in which a transistor having a gate and source/drain regions is formed;
forming a first insulating layer on said semiconductor substrate;
forming an interlayer insulating layer on said first insulating layer;
forming an etch-blocking layer on said interlayer insulating layer;
forming a second insulating layer on said etch-blocking layer;
selectively etching said first insulating layer, said interlayer insulating layer, said etch-blocking layer, and said second insulating layer, to thereby form contact holes to expose said source/drain regions;
forming a conductive layer on the surface of the resultant structure, including surface portions defining said contact holes;
depositing a mask layer on said conductive layer;
depositing a photoresist layer on said mask layer;
patterning said photoresist layer in accordance with a capacitor storage electrode pattern, to thereby form a photoresist pattern;
anisotropically etching said mask layer, using said photoresist pattern as an etching mask, to thereby form a mask layer pattern, wherein etch by-products are formed on sidewalls of a composite layer comprised of said photoresist pattern and said mask layer pattern;
and,
etching said conductive layer using said composite layer and said etch by-products as an etching mask, to thereby form a fine pattern.

10 more elements

Dependencies are inferred from the claim text.

Method for forming fine patterns in a semiconductor device

Life of this patent

Method for forming fine patterns in a semiconductor device

Life of this patent

Abstract

Claims7